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-rw-r--r--compiler/nativeGen/X86/CodeGen.hs92
1 files changed, 0 insertions, 92 deletions
diff --git a/compiler/nativeGen/X86/CodeGen.hs b/compiler/nativeGen/X86/CodeGen.hs
index 140e8b2992..fa93767fa3 100644
--- a/compiler/nativeGen/X86/CodeGen.hs
+++ b/compiler/nativeGen/X86/CodeGen.hs
@@ -1761,93 +1761,6 @@ genCCall dflags is32Bit (PrimTarget (MO_UF_Conv width)) dest_regs args = do
where
lbl = mkCmmCodeLabel primPackageId (fsLit (word2FloatLabel width))
-genCCall dflags _ (PrimTarget (MO_AtomicRMW width amop)) [dst] [addr, n] = do
- Amode amode addr_code <- getAmode addr
- arg <- getNewRegNat size
- arg_code <- getAnyReg n
- use_sse2 <- sse2Enabled
- let platform = targetPlatform dflags
- dst_r = getRegisterReg platform use_sse2 (CmmLocal dst)
- code <- op_code dst_r arg amode
- return $ addr_code `appOL` arg_code arg `appOL` code
- where
- -- Code for the operation
- op_code :: Reg -- ^ The destination reg
- -> Reg -- ^ Register containing argument
- -> AddrMode -- ^ Address of location to mutate
- -> NatM (OrdList Instr)
- op_code dst_r arg amode = case amop of
- -- In the common case where dst_r is a virtual register the
- -- final move should go away, because it's the last use of arg
- -- and the first use of dst_r.
- AMO_Add -> return $ toOL [ LOCK
- , XADD size (OpReg arg) (OpAddr amode)
- , MOV size (OpReg arg) (OpReg dst_r)
- ]
- AMO_Sub -> return $ toOL [ NEGI size (OpReg arg)
- , LOCK
- , XADD size (OpReg arg) (OpAddr amode)
- , MOV size (OpReg arg) (OpReg dst_r)
- ]
- AMO_And -> cmpxchg_code (\ src dst -> unitOL $ AND size src dst)
- AMO_Nand -> cmpxchg_code (\ src dst -> toOL [ AND size src dst
- , NOT size dst
- ])
- AMO_Or -> cmpxchg_code (\ src dst -> unitOL $ OR size src dst)
- AMO_Xor -> cmpxchg_code (\ src dst -> unitOL $ XOR size src dst)
- where
- -- Simulate operation that lacks a dedicated instruction using
- -- cmpxchg.
- cmpxchg_code :: (Operand -> Operand -> OrdList Instr)
- -> NatM (OrdList Instr)
- cmpxchg_code instrs = do
- lbl <- getBlockIdNat
- tmp <- getNewRegNat size
- return $ toOL
- [ MOV size (OpAddr amode) (OpReg eax)
- , JXX ALWAYS lbl
- , NEWBLOCK lbl
- -- Keep old value so we can return it:
- , MOV size (OpReg eax) (OpReg dst_r)
- , MOV size (OpReg eax) (OpReg tmp)
- ]
- `appOL` instrs (OpReg arg) (OpReg tmp) `appOL` toOL
- [ LOCK
- , CMPXCHG size (OpReg tmp) (OpAddr amode)
- , JXX NE lbl
- ]
-
- size = intSize width
-
-genCCall dflags _ (PrimTarget (MO_AtomicRead width)) [dst] [addr] = do
- load_code <- intLoadCode (MOV (intSize width)) addr
- let platform = targetPlatform dflags
- use_sse2 <- sse2Enabled
- return (load_code (getRegisterReg platform use_sse2 (CmmLocal dst)))
-
-genCCall _ _ (PrimTarget (MO_AtomicWrite width)) [] [addr, val] = do
- assignMem_IntCode (intSize width) addr val
-
-genCCall dflags _ (PrimTarget (MO_Cmpxchg width)) [dst] [addr, old, new] = do
- Amode amode addr_code <- getAmode addr
- newval <- getNewRegNat size
- newval_code <- getAnyReg new
- oldval <- getNewRegNat size
- oldval_code <- getAnyReg old
- use_sse2 <- sse2Enabled
- let platform = targetPlatform dflags
- dst_r = getRegisterReg platform use_sse2 (CmmLocal dst)
- code = toOL
- [ MOV size (OpReg oldval) (OpReg eax)
- , LOCK
- , CMPXCHG size (OpReg newval) (OpAddr amode)
- , MOV size (OpReg eax) (OpReg dst_r)
- ]
- return $ addr_code `appOL` newval_code newval `appOL` oldval_code oldval
- `appOL` code
- where
- size = intSize width
-
genCCall _ is32Bit target dest_regs args
| is32Bit = genCCall32 target dest_regs args
| otherwise = genCCall64 target dest_regs args
@@ -2472,11 +2385,6 @@ outOfLineCmmOp mop res args
MO_PopCnt _ -> fsLit "popcnt"
MO_BSwap _ -> fsLit "bswap"
- MO_AtomicRMW _ _ -> fsLit "atomicrmw"
- MO_AtomicRead _ -> fsLit "atomicread"
- MO_AtomicWrite _ -> fsLit "atomicwrite"
- MO_Cmpxchg _ -> fsLit "cmpxchg"
-
MO_UF_Conv _ -> unsupported
MO_S_QuotRem {} -> unsupported