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-rw-r--r--compiler/nativeGen/RegAlloc/Linear/Main.hs10
1 files changed, 3 insertions, 7 deletions
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index 3eab7856ab..229fd32f57 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -132,20 +132,16 @@ regAlloc (CmmData sec d)
( CmmData sec d
, Nothing )
-regAlloc (CmmProc (LiveInfo info _ _) lbl params (ListGraph []))
+regAlloc (CmmProc (LiveInfo info _ _) lbl params [])
= return ( CmmProc info lbl params (ListGraph [])
, Nothing )
-regAlloc (CmmProc static lbl params (ListGraph comps))
+regAlloc (CmmProc static lbl params sccs)
| LiveInfo info (Just first_id) (Just block_live) <- static
= do
-- do register allocation on each component.
(final_blocks, stats)
- <- linearRegAlloc first_id block_live
- $ map (\b -> case b of
- BasicBlock _ [b] -> AcyclicSCC b
- BasicBlock _ bs -> CyclicSCC bs)
- $ comps
+ <- linearRegAlloc first_id block_live sccs
-- make sure the block that was first in the input list
-- stays at the front of the output