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-rw-r--r--compiler/nativeGen/RegAlloc/Graph/Main.hs6
1 files changed, 4 insertions, 2 deletions
diff --git a/compiler/nativeGen/RegAlloc/Graph/Main.hs b/compiler/nativeGen/RegAlloc/Graph/Main.hs
index 6b01298ac6..069c8c0069 100644
--- a/compiler/nativeGen/RegAlloc/Graph/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/Main.hs
@@ -212,8 +212,10 @@ regAlloc_spin
<- regSpill code_coalesced slotsFree rsSpill
-- recalculate liveness
--- let code_nat = map stripLive code_spilled
- code_relive <- mapM regLiveness code_spilled
+ -- NOTE: we have to reverse the SCCs here to get them back into the reverse-dependency
+ -- order required by computeLiveness. If they're not in the correct order
+ -- that function will panic.
+ code_relive <- mapM (regLiveness . reverseBlocksInTops) code_spilled
-- record what happened in this stage for debugging
let stat =