diff options
| author | Austin Seipp <austin@well-typed.com> | 2013-10-01 21:13:14 -0500 |
|---|---|---|
| committer | Austin Seipp <austin@well-typed.com> | 2013-10-01 21:26:47 -0500 |
| commit | fd74014079f14bd3ab50e328e52c44ef97d40e05 (patch) | |
| tree | da31c992a76d3816a4f1012ceb1eb4e68d0fb556 /compiler/nativeGen/SPARC/CodeGen.hs | |
| parent | 627d1e008cbe4d9318b2466394420a968d1659da (diff) | |
| download | haskell-fd74014079f14bd3ab50e328e52c44ef97d40e05.tar.gz | |
Add support for prefetch with locality levels.
This patch adds support for several new primitive operations which
support using processor-specific instructions to help guide data and
cache locality decisions. We have levels ranging from [0..3]
For LLVM, we generate llvm.prefetch intrinsics at the proper locality
level (similar to GCC.)
For x86 we generate prefetch{NTA, t2, t1, t0} instructions. On SPARC and
PowerPC, the locality levels are ignored.
This closes #8256.
Authored-by: Carter Tazio Schonwald <carter.schonwald@gmail.com>
Signed-off-by: Austin Seipp <austin@well-typed.com>
Diffstat (limited to 'compiler/nativeGen/SPARC/CodeGen.hs')
| -rw-r--r-- | compiler/nativeGen/SPARC/CodeGen.hs | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/compiler/nativeGen/SPARC/CodeGen.hs b/compiler/nativeGen/SPARC/CodeGen.hs index 5d2b9a9d6d..5d65b427e1 100644 --- a/compiler/nativeGen/SPARC/CodeGen.hs +++ b/compiler/nativeGen/SPARC/CodeGen.hs @@ -392,7 +392,10 @@ genCCall -- In the SPARC case we don't need a barrier. -- genCCall (PrimTarget MO_WriteBarrier) _ _ - = do return nilOL + = return $ nilOL + +genCCall (PrimTarget (MO_Prefetch_Data _)) _ _ + = return $ nilOL genCCall target dest_regs args0 = do @@ -657,7 +660,7 @@ outOfLineMachOp_table mop MO_U_Mul2 {} -> unsupported MO_WriteBarrier -> unsupported MO_Touch -> unsupported - MO_Prefetch_Data -> unsupported + (MO_Prefetch_Data _) -> unsupported where unsupported = panic ("outOfLineCmmOp: " ++ show mop ++ " not supported here") |