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| author | Matthew Pickering <matthewtpickering@gmail.com> | 2017-04-04 21:47:29 -0400 |
|---|---|---|
| committer | Ben Gamari <ben@smart-cactus.org> | 2017-04-04 21:47:51 -0400 |
| commit | 1831aed16d9883b2845fa6997e38b9ac3d72f191 (patch) | |
| tree | 5f18307cfda76206dc74f15f0678039e667d2427 /compiler/nativeGen/RegAlloc/Linear | |
| parent | 5315223683b64c665959781112f8206fb8230a54 (diff) | |
| download | haskell-1831aed16d9883b2845fa6997e38b9ac3d72f191.tar.gz | |
Replace Digraph's Node type synonym with a data type
This refactoring makes it more obvious when we are constructing
a Node for the digraph rather than a less useful 3-tuple.
Reviewers: austin, goldfire, bgamari, simonmar, dfeuer
Reviewed By: dfeuer
Subscribers: rwbarton, thomie
Differential Revision: https://phabricator.haskell.org/D3414
Diffstat (limited to 'compiler/nativeGen/RegAlloc/Linear')
| -rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs b/compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs index 186ff3f622..1b639c9757 100644 --- a/compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs +++ b/compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs @@ -229,7 +229,7 @@ joinToTargets_again -- We cut some corners by not handling memory-to-memory moves. -- This shouldn't happen because every temporary gets its own stack slot. -- -makeRegMovementGraph :: RegMap Loc -> RegMap Loc -> [(Unique, Loc, [Loc])] +makeRegMovementGraph :: RegMap Loc -> RegMap Loc -> [Node Loc Unique] makeRegMovementGraph adjusted_assig dest_assig = [ node | (vreg, src) <- nonDetUFMToList adjusted_assig -- This is non-deterministic but we do not @@ -255,15 +255,15 @@ expandNode :: a -> Loc -- ^ source of move -> Loc -- ^ destination of move - -> [(a, Loc, [Loc])] + -> [Node Loc a ] expandNode vreg loc@(InReg src) (InBoth dst mem) - | src == dst = [(vreg, loc, [InMem mem])] - | otherwise = [(vreg, loc, [InReg dst, InMem mem])] + | src == dst = [DigraphNode vreg loc [InMem mem]] + | otherwise = [DigraphNode vreg loc [InReg dst, InMem mem]] expandNode vreg loc@(InMem src) (InBoth dst mem) - | src == mem = [(vreg, loc, [InReg dst])] - | otherwise = [(vreg, loc, [InReg dst, InMem mem])] + | src == mem = [DigraphNode vreg loc [InReg dst]] + | otherwise = [DigraphNode vreg loc [InReg dst, InMem mem]] expandNode _ (InBoth _ src) (InMem dst) | src == dst = [] -- guaranteed to be true @@ -276,7 +276,7 @@ expandNode vreg (InBoth src _) dst expandNode vreg src dst | src == dst = [] - | otherwise = [(vreg, src, [dst])] + | otherwise = [DigraphNode vreg src [dst]] -- | Generate fixup code for a particular component in the move graph @@ -286,14 +286,14 @@ expandNode vreg src dst -- handleComponent :: Instruction instr - => Int -> instr -> SCC (Unique, Loc, [Loc]) + => Int -> instr -> SCC (Node Loc Unique) -> RegM freeRegs [instr] -- If the graph is acyclic then we won't get the swapping problem below. -- In this case we can just do the moves directly, and avoid having to -- go via a spill slot. -- -handleComponent delta _ (AcyclicSCC (vreg, src, dsts)) +handleComponent delta _ (AcyclicSCC (DigraphNode vreg src dsts)) = mapM (makeMove delta vreg src) dsts @@ -313,7 +313,7 @@ handleComponent delta _ (AcyclicSCC (vreg, src, dsts)) -- require a fixup. -- handleComponent delta instr - (CyclicSCC ((vreg, InReg sreg, (InReg dreg: _)) : rest)) + (CyclicSCC ((DigraphNode vreg (InReg sreg) ((InReg dreg: _))) : rest)) -- dest list may have more than one element, if the reg is also InMem. = do -- spill the source into its slot |