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| author | Jingyun Hua <huajingyun@loongson.cn> | 2022-02-08 20:47:10 +0800 |
|---|---|---|
| committer | Jingyun Hua <huajingyun@loongson.cn> | 2022-02-08 20:47:10 +0800 |
| commit | fe85bbdf4cb891a67a8e2109c1c22a33aa958c7e (patch) | |
| tree | 25492f97dc329ae14739afde80795d3a8f32fcf4 /src/base/basictypes.h | |
| parent | e80652b6279a22bd4a4264e4403cd1981293e82f (diff) | |
| download | gperftools-fe85bbdf4cb891a67a8e2109c1c22a33aa958c7e.tar.gz | |
Add support for LoongArch.
Only 64-bit is supported at the moment.
Signed-off-by: Jingyun Hua <huajingyun@loongson.cn>
Diffstat (limited to 'src/base/basictypes.h')
| -rw-r--r-- | src/base/basictypes.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/base/basictypes.h b/src/base/basictypes.h index ea87a6d..5814d5b 100644 --- a/src/base/basictypes.h +++ b/src/base/basictypes.h @@ -387,6 +387,8 @@ class AssignAttributeStartEnd { # define CACHELINE_ALIGNED __attribute__((aligned(64))) # elif (defined(__e2k__)) # define CACHELINE_ALIGNED __attribute__((aligned(64))) +# elif defined(__loongarch64) +# define CACHELINE_ALIGNED __attribute__((aligned(64))) # else # error Could not determine cache line length - unknown architecture # endif |