all: merge dev.cc (81884b89bd88) into default

With this change, default now contains Go 1.5 work.
Any future bug fixes for Go 1.4 in the compilers or
the runtime will have to be made directly to the
release branch.

4 files changed, 89 insertions, 55 deletions

diff --git a/src/cmd/5g/gobj.c b/src/cmd/5g/gobj.c
index 5e988878f..65f731685 100644
--- a/src/cmd/5g/gobj.c
+++ b/src/cmd/5g/gobj.c
@@ -86,7 +86,7 @@ datagostring(Strlit *sval, Addr *a)
 	sym = stringsym(sval->s, sval->len);
 	a->type = D_OREG;
 	a->name = D_EXTERN;
-	a->etype = TINT32;
+	a->etype = TSTRING;
 	a->offset = 0;  // header
 	a->reg = NREG;
 	a->sym = linksym(sym);
diff --git a/src/cmd/5g/gsubr.c b/src/cmd/5g/gsubr.c
index 06e274e14..f09197963 100644
--- a/src/cmd/5g/gsubr.c
+++ b/src/cmd/5g/gsubr.c
@@ -1353,9 +1353,10 @@ naddr(Node *n, Addr *a, int canemitcode)
 	case OITAB:
 		// itable of interface value
 		naddr(n->left, a, canemitcode);
-		a->etype = TINT32;
+		a->etype = simtype[tptr];
 		if(a->type == D_CONST && a->offset == 0)
 			break;	// len(nil)
+		a->width = widthptr;
 		break;
 
 	case OSPTR:
diff --git a/src/cmd/5g/opt.h b/src/cmd/5g/opt.h
index 1946c1d33..a606f1d31 100644
--- a/src/cmd/5g/opt.h
+++ b/src/cmd/5g/opt.h
@@ -63,8 +63,8 @@ enum
 
 uint32 BLOAD(Reg*);
 uint32 BSTORE(Reg*);
-uint32 LOAD(Reg*);
-uint32 STORE(Reg*);
+uint64 LOAD(Reg*);
+uint64 STORE(Reg*);
 */
 
 // A Reg is a wrapper around a single Prog (one instruction) that holds
@@ -75,12 +75,18 @@ struct	Reg
 {
 	Flow	f;
 
-	Bits	set;  		// variables written by this instruction.
-	Bits	use1; 		// variables read by prog->from.
-	Bits	use2; 		// variables read by prog->to.
+	Bits	set;  		// regopt variables written by this instruction.
+	Bits	use1; 		// regopt variables read by prog->from.
+	Bits	use2; 		// regopt variables read by prog->to.
 
+	// refahead/refbehind are the regopt variables whose current
+	// value may be used in the following/preceding instructions
+	// up to a CALL (or the value is clobbered).
 	Bits	refbehind;
 	Bits	refahead;
+	// calahead/calbehind are similar, but for variables in
+	// instructions that are reachable after hitting at least one
+	// CALL.
 	Bits	calbehind;
 	Bits	calahead;
 	Bits	regdiff;
@@ -93,6 +99,16 @@ struct	Reg
 
 #define	NRGN	600
 /*c2go enum { NRGN = 600 }; */
+
+// A Rgn represents a single regopt variable over a region of code
+// where a register could potentially be dedicated to that variable.
+// The code encompassed by a Rgn is defined by the flow graph,
+// starting at enter, flood-filling forward while varno is refahead
+// and backward while varno is refbehind, and following branches.  A
+// single variable may be represented by multiple disjoint Rgns and
+// each Rgn may choose a different register for that variable.
+// Registers are allocated to regions greedily in order of descending
+// cost.
 struct	Rgn
 {
 	Reg*	enter;
@@ -144,8 +160,8 @@ void	prop(Reg*, Bits, Bits);
 void	synch(Reg*, Bits);
 uint32	allreg(uint32, Rgn*);
 void	paint1(Reg*, int);
-uint32	paint2(Reg*, int);
-void	paint3(Reg*, int, int32, int);
+uint32	paint2(Reg*, int, int);
+void	paint3(Reg*, int, uint32, int);
 void	addreg(Adr*, int);
 void	dumpit(char *str, Flow *r0, int);
 
@@ -156,10 +172,10 @@ void	peep(Prog*);
 void	excise(Flow*);
 int	copyu(Prog*, Adr*, Adr*);
 
-int32	RtoB(int);
-int32	FtoB(int);
-int	BtoR(int32);
-int	BtoF(int32);
+uint32	RtoB(int);
+uint32	FtoB(int);
+int	BtoR(uint32);
+int	BtoF(uint32);
 
 /*
  * prog.c
@@ -187,16 +203,16 @@ enum
 	SizeF = 1<<7, // float aka float32
 	SizeD = 1<<8, // double aka float64
 
-	// Left side: address taken, read, write.
+	// Left side (Prog.from): address taken, read, write.
 	LeftAddr = 1<<9,
 	LeftRead = 1<<10,
 	LeftWrite = 1<<11,
 	
-	// Register in middle; never written.
+	// Register in middle (Prog.reg); only ever read.
 	RegRead = 1<<12,
 	CanRegRead = 1<<13,
 	
-	// Right side: address taken, read, write.
+	// Right side (Prog.to): address taken, read, write.
 	RightAddr = 1<<14,
 	RightRead = 1<<15,
 	RightWrite = 1<<16,
diff --git a/src/cmd/5g/reg.c b/src/cmd/5g/reg.c
index b78c268df..30fb81601 100644
--- a/src/cmd/5g/reg.c
+++ b/src/cmd/5g/reg.c
@@ -35,7 +35,7 @@
 #include "opt.h"
 
 #define	NREGVAR	32
-#define	REGBITS	((uint32)0xffffffff)
+#define	REGBITS	((uint64)0xffffffffull)
 /*c2go enum {
 	NREGVAR = 32,
 	REGBITS = 0xffffffff,
@@ -86,7 +86,7 @@ setaddrs(Bits bit)
 		i = bnum(bit);
 		node = var[i].node;
 		n = var[i].name;
-		bit.b[i/32] &= ~(1L<<(i%32));
+		biclr(&bit, i);
 
 		// disable all pieces of that variable
 		for(i=0; i<nvar; i++) {
@@ -393,7 +393,7 @@ loop2:
 		for(z=0; z<BITS; z++)
 			bit.b[z] = (r->refahead.b[z] | r->calahead.b[z]) &
 			  ~(externs.b[z] | params.b[z] | addrs.b[z] | consts.b[z]);
-		if(bany(&bit) & !r->f.refset) {
+		if(bany(&bit) && !r->f.refset) {
 			// should never happen - all variables are preset
 			if(debug['w'])
 				print("%L: used and not set: %Q\n", r->f.prog->lineno, bit);
@@ -425,7 +425,7 @@ loop2:
 			if(debug['R'] > 1)
 				print("\n");
 			paint1(r, i);
-			bit.b[i/32] &= ~(1L<<(i%32));
+			biclr(&bit, i);
 			if(change <= 0) {
 				if(debug['R'])
 					print("%L $%d: %Q\n",
@@ -454,9 +454,13 @@ brk:
 	 * replace code (paint3)
 	 */
 	rgp = region;
+	if(debug['R'] && debug['v'])
+		print("\nregisterizing\n");
 	for(i=0; i<nregion; i++) {
+		if(debug['R'] && debug['v'])
+			print("region %d: cost %d varno %d enter %lld\n", i, rgp->cost, rgp->varno, rgp->enter->f.prog->pc);
 		bit = blsh(rgp->varno);
-		vreg = paint2(rgp->enter, rgp->varno);
+		vreg = paint2(rgp->enter, rgp->varno, 0);
 		vreg = allreg(vreg, rgp);
 		if(debug['R']) {
 			if(rgp->regno >= NREG)
@@ -477,9 +481,6 @@ brk:
 		rgp++;
 	}
 
-	if(debug['R'] && debug['v'])
-		dumpit("pass6", &firstr->f, 1);
-
 	/*
 	 * free aux structures. peep allocates new ones.
 	 */
@@ -488,6 +489,15 @@ brk:
 	flowend(g);
 	firstr = R;
 
+	if(debug['R'] && debug['v']) {
+		// Rebuild flow graph, since we inserted instructions
+		g = flowstart(firstp, sizeof(Reg));
+		firstr = (Reg*)g->start;
+		dumpit("pass6", &firstr->f, 1);
+		flowend(g);
+		firstr = R;
+	}
+
 	/*
 	 * pass 7
 	 * peep-hole on basic block
@@ -570,7 +580,7 @@ walkvardef(Node *n, Reg *r, int active)
 			break;
 		for(v=n->opt; v!=nil; v=v->nextinnode) {
 			bn = v - var;
-			r1->act.b[bn/32] |= 1L << (bn%32);
+			biset(&r1->act, bn);
 		}
 		if(r1->f.prog->as == ABL)
 			break;
@@ -606,7 +616,7 @@ addsplits(void)
 					~(r->calahead.b[z] & addrs.b[z]);
 			while(bany(&bit)) {
 				i = bnum(bit);
-				bit.b[i/32] &= ~(1L << (i%32));
+				biclr(&bit, i);
 			}
 		}
 	}
@@ -972,10 +982,10 @@ prop(Reg *r, Bits ref, Bits cal)
 			for(z=0; z<BITS; z++) {
 				if(cal.b[z] == 0)
 					continue;
-				for(i=0; i<32; i++) {
-					if(z*32+i >= nvar || ((cal.b[z]>>i)&1) == 0)
+				for(i=0; i<64; i++) {
+					if(z*64+i >= nvar || ((cal.b[z]>>i)&1) == 0)
 						continue;
-					v = var+z*32+i;
+					v = var+z*64+i;
 					if(v->node->opt == nil) // v represents fixed register, not Go variable
 						continue;
 
@@ -991,10 +1001,10 @@ prop(Reg *r, Bits ref, Bits cal)
 					// This will set the bits at most twice, keeping the overall loop linear.
 					v1 = v->node->opt;
 					j = v1 - var;
-					if(v == v1 || ((cal.b[j/32]>>(j&31))&1) == 0) {
+					if(v == v1 || !btest(&cal, j)) {
 						for(; v1 != nil; v1 = v1->nextinnode) {
 							j = v1 - var;
-							cal.b[j/32] |= 1<<(j&31);
+							biset(&cal, j);
 						}
 					}
 				}
@@ -1115,10 +1125,10 @@ paint1(Reg *r, int bn)
 	Reg *r1;
 	Prog *p;
 	int z;
-	uint32 bb;
+	uint64 bb;
 
-	z = bn/32;
-	bb = 1L<<(bn%32);
+	z = bn/64;
+	bb = 1LL<<(bn%64);
 	if(r->act.b[z] & bb)
 		return;
 	for(;;) {
@@ -1189,14 +1199,14 @@ paint1(Reg *r, int bn)
 }
 
 uint32
-paint2(Reg *r, int bn)
+paint2(Reg *r, int bn, int depth)
 {
 	Reg *r1;
 	int z;
-	uint32 bb, vreg;
+	uint64 bb, vreg;
 
-	z = bn/32;
-	bb = 1L << (bn%32);
+	z = bn/64;
+	bb = 1LL << (bn%64);
 	vreg = regbits;
 	if(!(r->act.b[z] & bb))
 		return vreg;
@@ -1213,6 +1223,9 @@ paint2(Reg *r, int bn)
 		r = r1;
 	}
 	for(;;) {
+		if(debug['R'] && debug['v'])
+			print("  paint2 %d %P\n", depth, r->f.prog);
+
 		r->act.b[z] &= ~bb;
 
 		vreg |= r->regu;
@@ -1220,14 +1233,14 @@ paint2(Reg *r, int bn)
 		if(r->refbehind.b[z] & bb)
 			for(r1 = (Reg*)r->f.p2; r1 != R; r1 = (Reg*)r1->f.p2link)
 				if(r1->refahead.b[z] & bb)
-					vreg |= paint2(r1, bn);
+					vreg |= paint2(r1, bn, depth+1);
 
 		if(!(r->refahead.b[z] & bb))
 			break;
 		r1 = (Reg*)r->f.s2;
 		if(r1 != R)
 			if(r1->refbehind.b[z] & bb)
-				vreg |= paint2(r1, bn);
+				vreg |= paint2(r1, bn, depth+1);
 		r = (Reg*)r->f.s1;
 		if(r == R)
 			break;
@@ -1240,15 +1253,15 @@ paint2(Reg *r, int bn)
 }
 
 void
-paint3(Reg *r, int bn, int32 rb, int rn)
+paint3(Reg *r, int bn, uint32 rb, int rn)
 {
 	Reg *r1;
 	Prog *p;
 	int z;
-	uint32 bb;
+	uint64 bb;
 
-	z = bn/32;
-	bb = 1L << (bn%32);
+	z = bn/64;
+	bb = 1LL << (bn%64);
 	if(r->act.b[z] & bb)
 		return;
 	for(;;) {
@@ -1333,7 +1346,7 @@ addreg(Adr *a, int rn)
  *	10	R10
  *	12  R12
  */
-int32
+uint32
 RtoB(int r)
 {
 	if(r >= REGTMP-2 && r != 12)	// excluded R9 and R10 for m and g, but not R12
@@ -1342,8 +1355,10 @@ RtoB(int r)
 }
 
 int
-BtoR(int32 b)
+BtoR(uint32 b)
 {
+	// TODO Allow R0 and R1, but be careful with a 0 return
+	// TODO Allow R9. Only R10 is reserved now (just g, not m).
 	b &= 0x11fcL;	// excluded R9 and R10 for m and g, but not R12
 	if(b == 0)
 		return 0;
@@ -1357,7 +1372,7 @@ BtoR(int32 b)
  *	...	...
  *	31	F15
  */
-int32
+uint32
 FtoB(int f)
 {
 
@@ -1367,7 +1382,7 @@ FtoB(int f)
 }
 
 int
-BtoF(int32 b)
+BtoF(uint32 b)
 {
 
 	b &= 0xfffc0000L;
@@ -1442,12 +1457,14 @@ dumpit(char *str, Flow *r0, int isreg)
 				print(" (only)");
 			print("\n");
 		}
-//		r1 = r->s1;
-//		if(r1 != nil) {
-//			print("	succ:");
-//			for(; r1 != R; r1 = r1->s1)
-//				print(" %.4ud", (int)r1->prog->pc);
-//			print("\n");
-//		}
+		// Print successors if it's not just the next one
+		if(r->s1 != r->link || r->s2 != nil) {
+			print("	succ:");
+			if(r->s1 != nil)
+				print(" %.4ud", (int)r->s1->prog->pc);
+			if(r->s2 != nil)
+				print(" %.4ud", (int)r->s2->prog->pc);
+			print("\n");
+		}
 	}
 }