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author | Cherry Zhang <cherryyz@google.com> | 2021-04-12 14:00:49 -0400 |
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committer | Cherry Zhang <cherryyz@google.com> | 2021-04-12 21:59:59 +0000 |
commit | 263e13d1f7d2d13782c5a63799c9979b9bbfd853 (patch) | |
tree | 89e7f58b299069d76560c06899fd6a887772bebd /test/codegen/bits.go | |
parent | 3d5e3a15f65f1dd622c87ffba58914c877c8112c (diff) | |
download | go-git-263e13d1f7d2d13782c5a63799c9979b9bbfd853.tar.gz |
test: make codegen tests work with both ABIs
Some codegen tests were written with the assumption that
arguments and results are in memory, and with a specific stack
layout. With the register ABI, the assumption is no longer true.
Adjust the tests to work with both cases.
- For tests expecting in memory arguments/results, change to use
global variables or memory-assigned argument/results.
- Allow more registers. E.g. some tests expecting register names
contain only letters (e.g. AX), but it can also contain numbers
(e.g. R10).
- Some instruction selection changes when operate on register vs.
memory, e.g. ADDQ vs. LEAQ, MOVB vs. MOVL. Accept both.
TODO: mathbits.go and memops.go still need fix.
Change-Id: Ic5932b4b5dd3f5d30ed078d296476b641420c4c5
Reviewed-on: https://go-review.googlesource.com/c/go/+/309335
Trust: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
Diffstat (limited to 'test/codegen/bits.go')
-rw-r--r-- | test/codegen/bits.go | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/test/codegen/bits.go b/test/codegen/bits.go index d41383f42c..2bd92dd51b 100644 --- a/test/codegen/bits.go +++ b/test/codegen/bits.go @@ -264,23 +264,23 @@ func bitcompl32(a, b uint32) (n uint32) { // check direct operation on memory with constant and shifted constant sources func bitOpOnMem(a []uint32, b, c, d uint32) { - // amd64:`ANDL\s[$]200,\s\([A-Z]+\)` + // amd64:`ANDL\s[$]200,\s\([A-Z][A-Z0-9]+\)` a[0] &= 200 - // amd64:`ORL\s[$]220,\s4\([A-Z]+\)` + // amd64:`ORL\s[$]220,\s4\([A-Z][A-Z0-9]+\)` a[1] |= 220 - // amd64:`XORL\s[$]240,\s8\([A-Z]+\)` + // amd64:`XORL\s[$]240,\s8\([A-Z][A-Z0-9]+\)` a[2] ^= 240 - // amd64:`BTRL\s[$]15,\s12\([A-Z]+\)`,-`ANDL` + // amd64:`BTRL\s[$]15,\s12\([A-Z][A-Z0-9]+\)`,-`ANDL` a[3] &= 0xffff7fff - // amd64:`BTSL\s[$]14,\s16\([A-Z]+\)`,-`ORL` + // amd64:`BTSL\s[$]14,\s16\([A-Z][A-Z0-9]+\)`,-`ORL` a[4] |= 0x4000 - // amd64:`BTCL\s[$]13,\s20\([A-Z]+\)`,-`XORL` + // amd64:`BTCL\s[$]13,\s20\([A-Z][A-Z0-9]+\)`,-`XORL` a[5] ^= 0x2000 - // amd64:`BTRL\s[A-Z]+,\s24\([A-Z]+\)` + // amd64:`BTRL\s[A-Z][A-Z0-9]+,\s24\([A-Z][A-Z0-9]+\)` a[6] &^= 1 << (b & 31) - // amd64:`BTSL\s[A-Z]+,\s28\([A-Z]+\)` + // amd64:`BTSL\s[A-Z][A-Z0-9]+,\s28\([A-Z][A-Z0-9]+\)` a[7] |= 1 << (c & 31) - // amd64:`BTCL\s[A-Z]+,\s32\([A-Z]+\)` + // amd64:`BTCL\s[A-Z][A-Z0-9]+,\s32\([A-Z][A-Z0-9]+\)` a[8] ^= 1 << (d & 31) } |