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authorMartin Möhrmann <moehrmann@google.com>2017-04-03 22:38:09 +0200
committerKeith Randall <khr@golang.org>2017-05-10 17:02:21 +0000
commit69972aea74de6a0397a05281475d1ca006da7bb0 (patch)
treef2147a8505d70bd63a2f51ffe57a33a4df2a1444 /src/hash
parent4fc498d89a1e7cef854ed95c00ce7fed817e75a4 (diff)
downloadgo-git-69972aea74de6a0397a05281475d1ca006da7bb0.tar.gz
internal/cpu: new package to detect cpu features
Implements detection of x86 cpu features that are used in the go standard library. Changes all standard library packages to use the new cpu package instead of using runtime internal variables to check x86 cpu features. Updates: #15403 Change-Id: I2999a10cb4d9ec4863ffbed72f4e021a1dbc4bb9 Reviewed-on: https://go-review.googlesource.com/41476 Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Keith Randall <khr@golang.org> Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
Diffstat (limited to 'src/hash')
-rw-r--r--src/hash/crc32/crc32_amd64.go30
-rw-r--r--src/hash/crc32/crc32_amd64.s30
-rw-r--r--src/hash/crc32/crc32_amd64p32.go14
-rw-r--r--src/hash/crc32/crc32_amd64p32.s11
4 files changed, 17 insertions, 68 deletions
diff --git a/src/hash/crc32/crc32_amd64.go b/src/hash/crc32/crc32_amd64.go
index 369a436be9..7017a89304 100644
--- a/src/hash/crc32/crc32_amd64.go
+++ b/src/hash/crc32/crc32_amd64.go
@@ -8,23 +8,20 @@
package crc32
-import "unsafe"
+import (
+ "internal/cpu"
+ "unsafe"
+)
// This file contains the code to call the SSE 4.2 version of the Castagnoli
// and IEEE CRC.
-// haveSSE41/haveSSE42/haveCLMUL are defined in crc_amd64.s and use
-// CPUID to test for SSE 4.1, 4.2 and CLMUL support.
-func haveSSE41() bool
-func haveSSE42() bool
-func haveCLMUL() bool
-
-// castagnoliSSE42 is defined in crc32_amd64.s and uses the SSE4.2 CRC32
+// castagnoliSSE42 is defined in crc32_amd64.s and uses the SSE 4.2 CRC32
// instruction.
//go:noescape
func castagnoliSSE42(crc uint32, p []byte) uint32
-// castagnoliSSE42Triple is defined in crc32_amd64.s and uses the SSE4.2 CRC32
+// castagnoliSSE42Triple is defined in crc32_amd64.s and uses the SSE 4.2 CRC32
// instruction.
//go:noescape
func castagnoliSSE42Triple(
@@ -38,9 +35,6 @@ func castagnoliSSE42Triple(
//go:noescape
func ieeeCLMUL(crc uint32, p []byte) uint32
-var sse42 = haveSSE42()
-var useFastIEEE = haveCLMUL() && haveSSE41()
-
const castagnoliK1 = 168
const castagnoliK2 = 1344
@@ -50,11 +44,11 @@ var castagnoliSSE42TableK1 *sse42Table
var castagnoliSSE42TableK2 *sse42Table
func archAvailableCastagnoli() bool {
- return sse42
+ return cpu.X86.HasSSE42
}
func archInitCastagnoli() {
- if !sse42 {
+ if !cpu.X86.HasSSE42 {
panic("arch-specific Castagnoli not available")
}
castagnoliSSE42TableK1 = new(sse42Table)
@@ -86,7 +80,7 @@ func castagnoliShift(table *sse42Table, crc uint32) uint32 {
}
func archUpdateCastagnoli(crc uint32, p []byte) uint32 {
- if !sse42 {
+ if !cpu.X86.HasSSE42 {
panic("not available")
}
@@ -197,13 +191,13 @@ func archUpdateCastagnoli(crc uint32, p []byte) uint32 {
}
func archAvailableIEEE() bool {
- return useFastIEEE
+ return cpu.X86.HasPCLMULQDQ && cpu.X86.HasSSE41
}
var archIeeeTable8 *slicing8Table
func archInitIEEE() {
- if !useFastIEEE {
+ if !cpu.X86.HasPCLMULQDQ || !cpu.X86.HasSSE41 {
panic("not available")
}
// We still use slicing-by-8 for small buffers.
@@ -211,7 +205,7 @@ func archInitIEEE() {
}
func archUpdateIEEE(crc uint32, p []byte) uint32 {
- if !useFastIEEE {
+ if !cpu.X86.HasPCLMULQDQ || !cpu.X86.HasSSE41 {
panic("not available")
}
diff --git a/src/hash/crc32/crc32_amd64.s b/src/hash/crc32/crc32_amd64.s
index 50c0ec83aa..d49093602e 100644
--- a/src/hash/crc32/crc32_amd64.s
+++ b/src/hash/crc32/crc32_amd64.s
@@ -134,36 +134,6 @@ loop:
MOVL DX, retC+104(FP)
RET
-// func haveSSE42() bool
-TEXT ·haveSSE42(SB),NOSPLIT,$0
- XORQ AX, AX
- INCL AX
- CPUID
- SHRQ $20, CX
- ANDQ $1, CX
- MOVB CX, ret+0(FP)
- RET
-
-// func haveCLMUL() bool
-TEXT ·haveCLMUL(SB),NOSPLIT,$0
- XORQ AX, AX
- INCL AX
- CPUID
- SHRQ $1, CX
- ANDQ $1, CX
- MOVB CX, ret+0(FP)
- RET
-
-// func haveSSE41() bool
-TEXT ·haveSSE41(SB),NOSPLIT,$0
- XORQ AX, AX
- INCL AX
- CPUID
- SHRQ $19, CX
- ANDQ $1, CX
- MOVB CX, ret+0(FP)
- RET
-
// CRC32 polynomial data
//
// These constants are lifted from the
diff --git a/src/hash/crc32/crc32_amd64p32.go b/src/hash/crc32/crc32_amd64p32.go
index 9d728fc8fe..1ec44cb496 100644
--- a/src/hash/crc32/crc32_amd64p32.go
+++ b/src/hash/crc32/crc32_amd64p32.go
@@ -4,33 +4,29 @@
package crc32
+import "internal/cpu"
+
// This file contains the code to call the SSE 4.2 version of the Castagnoli
// CRC.
-// haveSSE42 is defined in crc32_amd64p32.s and uses CPUID to test for SSE 4.2
-// support.
-func haveSSE42() bool
-
// castagnoliSSE42 is defined in crc32_amd64p32.s and uses the SSE4.2 CRC32
// instruction.
//go:noescape
func castagnoliSSE42(crc uint32, p []byte) uint32
-var sse42 = haveSSE42()
-
func archAvailableCastagnoli() bool {
- return sse42
+ return cpu.X86.HasSSE42
}
func archInitCastagnoli() {
- if !sse42 {
+ if !cpu.X86.HasSSE42 {
panic("not available")
}
// No initialization necessary.
}
func archUpdateCastagnoli(crc uint32, p []byte) uint32 {
- if !sse42 {
+ if !cpu.X86.HasSSE42 {
panic("not available")
}
return castagnoliSSE42(crc, p)
diff --git a/src/hash/crc32/crc32_amd64p32.s b/src/hash/crc32/crc32_amd64p32.s
index b6770eba3e..502bceac57 100644
--- a/src/hash/crc32/crc32_amd64p32.s
+++ b/src/hash/crc32/crc32_amd64p32.s
@@ -51,14 +51,3 @@ done:
NOTL AX
MOVL AX, ret+16(FP)
RET
-
-// func haveSSE42() bool
-TEXT ·haveSSE42(SB),NOSPLIT,$0
- XORQ AX, AX
- INCL AX
- CPUID
- SHRQ $20, CX
- ANDQ $1, CX
- MOVB CX, ret+0(FP)
- RET
-