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author | Torbjorn Granlund <tege@gmplib.org> | 2012-03-27 08:25:08 +0200 |
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committer | Torbjorn Granlund <tege@gmplib.org> | 2012-03-27 08:25:08 +0200 |
commit | 4f648b63ebf099d1f9496016b832beab8e6a9f3d (patch) | |
tree | 3ff81c52a9ced72d332d89f0fe44fc75f2cd25eb | |
parent | 50ce0b619a3df7e3f7970c03ec164f0a894a505f (diff) | |
download | gmp-4f648b63ebf099d1f9496016b832beab8e6a9f3d.tar.gz |
Fix typo in coreisbr recognition.
-rw-r--r-- | ChangeLog | 4 | ||||
-rwxr-xr-x | config.guess | 2 |
2 files changed, 5 insertions, 1 deletions
@@ -1,3 +1,7 @@ +2012-03-27 Torbjorn Granlund <tege@gmplib.org> + + * config.guess: Fix typo in coreisbr recognition. + 2012-03-26 Marco Bodrato <bodrato@mail.dm.unipi.it> * mpn/x86_64/gcd_1.asm: Reduce latency. diff --git a/config.guess b/config.guess index eb970cb1e..d6e9acde3 100755 --- a/config.guess +++ b/config.guess @@ -777,7 +777,7 @@ main () else if (model == 0x27) cpu_64bit = 1, modelstr = "atom"; /* Saltwell */ else if (model == 0x2a) cpu_64bit = 1, modelstr = "coreisbr"; /* SB */ else if (model == 0x2c) cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Gulftown */ - else if (model == 0x2d) cpu_64bit = 1, modelstr = "coreisrb"; /* SBC-EP */ + else if (model == 0x2d) cpu_64bit = 1, modelstr = "coreisbr"; /* SBC-EP */ else if (model == 0x2e) cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Beckton */ else if (model == 0x2f) cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Eagleton */ else cpu_64bit = 1, modelstr = "corei"; /* default */ |