diff options
| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-02-27 09:46:46 -0600 |
|---|---|---|
| committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-02-27 12:58:33 -0600 |
| commit | cac626d60a863e48ab75417064984769e58c5719 (patch) | |
| tree | 72cfaf38f3f0ae48808e8a088526c12592dc2feb /sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c | |
| parent | 4393fc119c34e97519b9b7a4fc94066b283be452 (diff) | |
| download | glibc-cac626d60a863e48ab75417064984769e58c5719.tar.gz | |
PowerPC: Optimized finite/finitef for POWER8
This patch add a optimized finite/finitef implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
Diffstat (limited to 'sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c')
| -rw-r--r-- | sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c index a7243b51aa..30b34bccc9 100644 --- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c +++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c @@ -23,10 +23,13 @@ extern __typeof (__finitef) __finitef_ppc64 attribute_hidden; /* The double-precision version also works for single-precision. */ extern __typeof (__finitef) __finite_power7 attribute_hidden; +extern __typeof (__finitef) __finite_power8 attribute_hidden; libc_ifunc (__finitef, - (hwcap & PPC_FEATURE_ARCH_2_06) - ? __finite_power7 + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __finite_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __finite_power7 : __finitef_ppc64); weak_alias (__finitef, finitef) |