diff options
| author | Carlos Eduardo Seo <carlos.seo@arm.com> | 2020-11-13 16:33:07 -0300 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2022-08-05 19:45:19 +0100 |
| commit | 2f3bf4cf639b49fd5a37ea300d84b638af8cde46 (patch) | |
| tree | f387219d25dcf786a76c1cd8cc65b535a6f65e71 | |
| parent | ccce788403ca63581a3ab08b619368223ed2502e (diff) | |
| download | glibc-arm/morello/v1.tar.gz | |
TODO(drop): aarch64: morello: CPU feature detection for Morelloarm/morello/v1
Initial detection of Arm Morello architecture from the HWCAP2 bit and CPU
identification from MIDR_EL0.
TODO: not needed?
- lp64 does not have to detect
- purecap can assume morello
| -rw-r--r-- | sysdeps/aarch64/multiarch/init-arch.h | 4 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 3 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 6 |
3 files changed, 12 insertions, 1 deletions
diff --git a/sysdeps/aarch64/multiarch/init-arch.h b/sysdeps/aarch64/multiarch/init-arch.h index a4dcac0019..d5219186be 100644 --- a/sysdeps/aarch64/multiarch/init-arch.h +++ b/sysdeps/aarch64/multiarch/init-arch.h @@ -35,4 +35,6 @@ bool __attribute__((unused)) mte = \ MTE_ENABLED (); \ bool __attribute__((unused)) sve = \ - GLRO(dl_aarch64_cpu_features).sve; + GLRO(dl_aarch64_cpu_features).sve; \ + bool __attribute__((unused)) morello = \ + GLRO(dl_hwcap2) & HWCAP2_MORELLO; diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index d14c0f4e1f..3d95815d5f 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -126,4 +126,7 @@ init_cpu_features (struct cpu_features *cpu_features) /* Check if SVE is supported. */ cpu_features->sve = GLRO (dl_hwcap) & HWCAP_SVE; + + /* Check if Morello is supported. */ + cpu_features->morello = GLRO (dl_hwcap2) & HWCAP2_MORELLO; } diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index 391165a99c..0742ac1409 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -68,6 +68,11 @@ #define IS_A64FX(midr) (MIDR_IMPLEMENTOR(midr) == 'F' \ && MIDR_PARTNUM(midr) == 0x001) +/* TODO: This is based on the Morello Fast Model. + Will MIDR_IMPLEMENTOR change to 'A'? */ +#define IS_MORELLO(midr) (MIDR_IMPLEMENTOR(midr) == 0x3f \ + && MIDR_PARTNUM(midr) == 0x412) + struct cpu_features { uint64_t midr_el1; @@ -76,6 +81,7 @@ struct cpu_features /* Currently, the GLIBC memory tagging tunable only defines 8 bits. */ uint8_t mte_state; bool sve; + bool morello; }; #endif /* _CPU_FEATURES_AARCH64_H */ |