diff options
author | Alexandre Oliva <aoliva@redhat.com> | 2004-06-28 19:26:37 +0000 |
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committer | Alexandre Oliva <aoliva@redhat.com> | 2004-06-28 19:26:37 +0000 |
commit | d33c4dd62066824cacd04f964a388c1236e61312 (patch) | |
tree | 63f31206fd625c1ffc1b518bd25ad82e8ce5f1ee /sim/h8300 | |
parent | 77996682226cbdcb0d9fd609ee2c60730d1ed9e4 (diff) | |
download | gdb-d33c4dd62066824cacd04f964a388c1236e61312.tar.gz |
sim/h8300/ChangeLog:
2003-07-23 Richard Sandiford <rsandifo@redhat.com>
* compile.c (sim_resume): Make sure that dst.reg refers to the
right register byte in mova/sz.l @(dd,RnL),ERn.
2003-07-21 Richard Sandiford <rsandifo@redhat.com>
* compile.c (sim_resume): Zero-extend immediate to muls, mulsu,
mulxs, divs and divxs.
sim/testsuite/sim/h8300/ChangeLog:
2003-07-22 Michael Snyder <msnyder@redhat.com>
* mul.s: Don't try to use negative immediate (it's always
unsigned).
* div.s: Ditto.
Diffstat (limited to 'sim/h8300')
-rw-r--r-- | sim/h8300/ChangeLog | 7 | ||||
-rw-r--r-- | sim/h8300/compile.c | 64 |
2 files changed, 16 insertions, 55 deletions
diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog index b77fcfc529d..d1a4fa09c8f 100644 --- a/sim/h8300/ChangeLog +++ b/sim/h8300/ChangeLog @@ -1,5 +1,12 @@ 2004-06-28 Alexandre Oliva <aoliva@redhat.com> + 2003-07-23 Richard Sandiford <rsandifo@redhat.com> + * compile.c (sim_resume): Make sure that dst.reg refers to the + right register byte in mova/sz.l @(dd,RnL),ERn. + 2003-07-21 Richard Sandiford <rsandifo@redhat.com> + * compile.c (sim_resume): Zero-extend immediate to muls, mulsu, + mulxs, divs and divxs. + * compile.c (sim_load): Update sd->memory_size. 2004-06-10 Michael Snyder <msnyder@redhat.com> diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 3e8992c09c3..3c11e8263d2 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -2037,7 +2037,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal) code->op3.literal = 0; if (OP_KIND (code->src.type) == OP_INDEXB) - code->dst.type = X (OP_REG, SB); + { + code->dst.type = X (OP_REG, SB); + code->dst.reg = code->op3.reg + 8; + } else code->dst.type = X (OP_REG, SW); } @@ -3886,13 +3889,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal) fetch (sd, &code->dst, &rd)) goto end; - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfff0; - else - ea = SEXTSHORT (ea); - + ea = SEXTSHORT (ea); res = SEXTSHORT (ea * SEXTSHORT (rd)); n = res & 0x8000; @@ -3907,11 +3904,6 @@ sim_resume (SIM_DESC sd, int step, int siggnal) fetch (sd, &code->dst, &rd)) goto end; - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfffffff0; - res = ea * rd; n = res & 0x80000000; @@ -3925,11 +3917,6 @@ sim_resume (SIM_DESC sd, int step, int siggnal) fetch (sd, &code->dst, &rd)) goto end; - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfffffff0; - /* Compute upper 32 bits of the 64-bit result. */ res = (((long long) ea) * ((long long) rd)) >> 32; @@ -3985,13 +3972,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal) fetch (sd, &code->dst, &rd)) goto end; - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfffffff0; - else - ea = SEXTCHAR (ea); - + ea = SEXTCHAR (ea); res = ea * SEXTCHAR (rd); n = res & 0x8000; @@ -4006,13 +3987,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal) fetch (sd, &code->dst, &rd)) goto end; - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfff0; - else - ea = SEXTSHORT (ea); - + ea = SEXTSHORT (ea); res = ea * SEXTSHORT (rd & 0xffff); n = res & 0x80000000; @@ -4103,11 +4078,6 @@ sim_resume (SIM_DESC sd, int step, int siggnal) fetch (sd, &code->dst, &rd)) goto end; - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfffffff0; - if (ea) { res = SEXTSHORT (rd) / SEXTSHORT (ea); @@ -4129,11 +4099,6 @@ sim_resume (SIM_DESC sd, int step, int siggnal) fetch (sd, &code->dst, &rd)) goto end; - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfffffff0; - if (ea) { res = rd / ea; @@ -4205,13 +4170,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal) goto end; rd = SEXTSHORT (rd); - - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfffffff0; - else - ea = SEXTCHAR (ea); + ea = SEXTCHAR (ea); if (ea) { @@ -4236,12 +4195,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal) fetch (sd, &code->dst, &rd)) goto end; - /* FIXME: is this the right place to be doing sign extend? */ - if (OP_KIND (code->src.type) == OP_IMM && - (ea & 8) != 0) - ea |= 0xfffffff0; - else - ea = SEXTSHORT (ea); + ea = SEXTSHORT (ea); if (ea) { |