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* re PR rtl-optimization/45912 (Patch for PR tree-optimization/44972 caused 250...Eric Botcazou2010-10-131-10/+9
* target.def (preferred_reload_class): New hook.Anatoly Sokolov2010-10-111-8/+10
* ira-int.h (target_ira_int): Add x_max_struct_costs_size...Richard Sandiford2010-07-121-25/+17
* toplev.h: Do not include diagnostic-core.h.Manuel López-Ibáñez2010-07-081-0/+1
* re PR middle-end/44566 (configuration with multiple targets / backends is not...Joern Rennecke2010-06-301-1/+2
* re PR rtl-optimization/39871 (Code size increase on ARM due to poor register ...Bernd Schmidt2010-06-041-0/+32
* ira-costs.c (ira_tune_allocno_costs_and_cover_classes): Fix typo.Jeff Law2010-05-211-1/+1
* ira.c (ira_non_ordered_class_hard_regs): Define.Vladimir Makarov2010-05-201-0/+27
* ira-costs.c (record_reg_classes): Ignore alternatives that are not enabled.Bernd Schmidt2010-04-101-0/+8
* Remove trailing white spaces.H.J. Lu2009-11-251-6/+6
* [multiple changes]Paolo Carlini2009-11-241-2/+0
* params.def (PARAM_IRA_LOOP_RESERVED_REGS): New.Vladimir Makarov2009-10-141-0/+1
* invoke.texi (-fsched-pressure): Document it.Vladimir Makarov2009-09-021-177/+299
* invoke.texi (-fvar-tracking-assignments): New.Alexandre Oliva2009-09-021-2/+2
* alias.c: Use REG_P...Shujing Zhao2009-06-221-3/+3
* Fix enum conversions which are invalid in C++:Ian Lance Taylor2009-04-201-4/+5
* re PR rtl-optimization/39762 (IRA ICE with -msoft-float)Vladimir Makarov2009-04-161-39/+24
* ira-cost.c (copy_cost): Lazilly initialize move_cost if needed.Jan Hubicka2008-12-181-4/+11
* tm.texi (TARGET_IRA_COVER_CLASSES): Modify description.Vladimir Makarov2008-12-091-11/+25
* ira-costs.c (find_allocno_class_costs): Work out the maximum allocno_costs va...Richard Sandiford2008-11-221-15/+29
* re PR rtl-optimization/37397 (IRA performance impact on SPEC CPU 2K/2006)Vladimir Makarov2008-11-141-3/+23
* re PR rtl-optimization/37948 (IRA generates slower code)Vladimir Makarov2008-11-101-5/+8
* ira-int.h (ira_allocno): Add member updated_cover_class_cost.Vladimir Makarov2008-10-271-2/+1
* re PR middle-end/37813 (assert with IRA_COVER_CLASSES with singleton)Vladimir Makarov2008-10-271-6/+17
* re PR target/37633 (wrong register use on sh64)Vladimir Makarov2008-10-161-2/+2
* [multiple changes]Vladimir Makarov2008-08-261-0/+1594