diff options
Diffstat (limited to 'gcc')
24 files changed, 1291 insertions, 213 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6d83b32ce96..076eaaeda89 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,187 @@ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.h (RS6000_SAVE_AREA): Handle ABI_ELFv2. + (RS6000_SAVE_TOC): Remove. + (RS6000_TOC_SAVE_SLOT): New macro. + * config/rs6000/rs6000.c (rs6000_parm_offset): New function. + (rs6000_parm_start): Use it. + (rs6000_function_arg_advance_1): Likewise. + (rs6000_emit_prologue): Use RS6000_TOC_SAVE_SLOT. + (rs6000_emit_epilogue): Likewise. + (rs6000_call_aix): Likewise. + (rs6000_output_function_prologue): Do not save/restore r11 + around calling _mcount for ABI_ELFv2. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000-protos.h (rs6000_reg_parm_stack_space): + Add prototype. + * config/rs6000/rs6000.h (RS6000_REG_SAVE): Remove. + (REG_PARM_STACK_SPACE): Call rs6000_reg_parm_stack_space. + * config/rs6000/rs6000.c (rs6000_parm_needs_stack): New function. + (rs6000_function_parms_need_stack): Likewise. + (rs6000_reg_parm_stack_space): Likewise. + (rs6000_function_arg): Do not replace BLKmode by Pmode when + returning a register argument. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Michael Gschwind <mkg@us.ibm.com> + + * config/rs6000/rs6000.h (FP_ARG_MAX_RETURN): New macro. + (ALTIVEC_ARG_MAX_RETURN): Likewise. + (FUNCTION_VALUE_REGNO_P): Use them. + * config/rs6000/rs6000.c (TARGET_RETURN_IN_MSB): Define. + (rs6000_return_in_msb): New function. + (rs6000_return_in_memory): Handle ELFv2 homogeneous aggregates. + Handle aggregates of up to 16 bytes for ELFv2. + (rs6000_function_value): Handle ELFv2 homogeneous aggregates. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Michael Gschwind <mkg@us.ibm.com> + + * config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define. + * config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function. + (rs6000_discover_homogeneous_aggregate): Likewise. + (rs6000_function_arg_boundary): Handle homogeneous aggregates. + (rs6000_function_arg_advance_1): Likewise. + (rs6000_function_arg): Likewise. + (rs6000_arg_partial_bytes): Likewise. + (rs6000_psave_function_arg): Handle BLKmode arguments. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Michael Gschwind <mkg@us.ibm.com> + + * config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define. + * config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function. + (rs6000_discover_homogeneous_aggregate): Likewise. + (rs6000_function_arg_boundary): Handle homogeneous aggregates. + (rs6000_function_arg_advance_1): Likewise. + (rs6000_function_arg): Likewise. + (rs6000_arg_partial_bytes): Likewise. + (rs6000_psave_function_arg): Handle BLKmode arguments. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (machine_function): New member + r2_setup_needed. + (rs6000_emit_prologue): Set r2_setup_needed if necessary. + (rs6000_output_mi_thunk): Set r2_setup_needed. + (rs6000_output_function_prologue): Output global entry point + prologue and local entry point marker if needed for ABI_ELFv2. + Output -mprofile-kernel code here. + (output_function_profiler): Do not output -mprofile-kernel + code here; moved to rs6000_output_function_prologue. + (rs6000_file_start): Output ".abiversion 2" for ABI_ELFv2. + + (rs6000_emit_move): Do not handle dot symbols for ABI_ELFv2. + (rs6000_output_function_entry): Likewise. + (rs6000_assemble_integer): Likewise. + (rs6000_elf_encode_section_info): Likewise. + (rs6000_elf_declare_function_name): Do not create dot symbols + or .opd section for ABI_ELFv2. + + (rs6000_trampoline_size): Update for ABI_ELFv2 trampolines. + (rs6000_trampoline_init): Likewise. + (rs6000_elf_file_end): Call file_end_indicate_exec_stack + for ABI_ELFv2. + + (rs6000_call_aix): Handle ELFv2 indirect calls. Do not check + for function descriptors in ABI_ELFv2. + + * config/rs6000/rs6000.md ("*call_indirect_aix<mode>"): Support + on ABI_AIX only, not ABI_ELFv2. + ("*call_value_indirect_aix<mode>"): Likewise. + ("*call_indirect_elfv2<mode>"): New pattern. + ("*call_value_indirect_elfv2<mode>"): Likewise. + + * config/rs6000/predicates.md ("symbol_ref_operand"): Do not + check for function descriptors in ABI_ELFv2. + ("current_file_function_operand"): Likewise. + + * config/rs6000/ppc-asm.h [__powerpc64__ && _CALL_ELF == 2]: + (toc): Undefine. + (FUNC_NAME): Define ELFv2 variant. + (JUMP_TARGET): Likewise. + (FUNC_START): Likewise. + (HIDDEN_FUNC): Likewise. + (FUNC_END): Likeiwse. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config.gcc [powerpc*-*-* | rs6000-*-*]: Support --with-abi=elfv1 + and --with-abi=elfv2. + * config/rs6000/option-defaults.h (OPTION_DEFAULT_SPECS): Add "abi". + * config/rs6000/rs6000.opt (mabi=elfv1): New option. + (mabi=elfv2): Likewise. + * config/rs6000/rs6000-opts.h (enum rs6000_abi): Add ABI_ELFv2. + * config/rs6000/linux64.h (DEFAULT_ABI): Do not hard-code to AIX_ABI + if !RS6000_BI_ARCH. + (ELFv2_ABI_CHECK): New macro. + (SUBSUBTARGET_OVERRIDE_OPTIONS): Use it to decide whether to set + rs6000_current_abi to ABI_AIX or ABI_ELFv2. + (GLIBC_DYNAMIC_LINKER64): Support ELFv2 ld.so version. + * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Predefine + _CALL_ELF and __STRUCT_PARM_ALIGN__ if appropriate. + + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Handle ABI_ELFv2. + (debug_stack_info): Likewise. + (rs6000_file_start): Treat ABI_ELFv2 the same as ABI_AIX. + (rs6000_legitimize_tls_address): Likewise. + (rs6000_conditional_register_usage): Likewise. + (rs6000_emit_move): Likewise. + (init_cumulative_args): Likewise. + (rs6000_function_arg_advance_1): Likewise. + (rs6000_function_arg): Likewise. + (rs6000_arg_partial_bytes): Likewise. + (rs6000_output_function_entry): Likewise. + (rs6000_assemble_integer): Likewise. + (rs6000_savres_strategy): Likewise. + (rs6000_stack_info): Likewise. + (rs6000_function_ok_for_sibcall): Likewise. + (rs6000_emit_load_toc_table): Likewise. + (rs6000_savres_routine_name): Likewise. + (ptr_regno_for_savres): Likewise. + (rs6000_emit_prologue): Likewise. + (rs6000_emit_epilogue): Likewise. + (rs6000_output_function_epilogue): Likewise. + (output_profile_hook): Likewise. + (output_function_profiler): Likewise. + (rs6000_trampoline_size): Likewise. + (rs6000_trampoline_init): Likewise. + (rs6000_elf_output_toc_section_asm_op): Likewise. + (rs6000_elf_encode_section_info): Likewise. + (rs6000_elf_reloc_rw_mask): Likewise. + (rs6000_elf_declare_function_name): Likewise. + (rs6000_function_arg_boundary): Treat ABI_ELFv2 the same as ABI_AIX, + except that rs6000_compat_align_parm is always assumed false. + (rs6000_gimplify_va_arg): Likewise. + (rs6000_call_aix): Update comment. + (rs6000_sibcall_aix): Likewise. + * config/rs6000/rs6000.md ("tls_gd_aix<TLSmode:tls_abi_suffix>"): + Treat ABI_ELFv2 the same as ABI_AIX. + ("*tls_gd_call_aix<TLSmode:tls_abi_suffix>"): Likewise. + ("tls_ld_aix<TLSmode:tls_abi_suffix>"): Likewise. + ("*tls_ld_call_aix<TLSmode:tls_abi_suffix>"): Likewise. + ("load_toc_aix_si"): Likewise. + ("load_toc_aix_di"): Likewise. + ("call"): Likewise. + ("call_value"): Likewise. + ("*call_local_aix<mode>"): Likewise. + ("*call_value_local_aix<mode>"): Likewise. + ("*call_nonlocal_aix<mode>"): Likewise. + ("*call_value_nonlocal_aix<mode>"): Likewise. + ("*call_indirect_aix<mode>"): Likewise. + ("*call_value_indirect_aix<mode>"): Likewise. + ("sibcall"): Likewise. + ("sibcall_value"): Likewise. + ("*sibcall_aix<mode>"): Likewise. + ("*sibcall_value_aix<mode>"): Likewise. + * config/rs6000/predicates.md ("symbol_ref_operand"): Likewise. + ("current_file_function_operand"): Likewise. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> * config/rs6000/rs6000.c (rs6000_arg_partial_bytes): Simplify logic by making use of the fact that for vector / floating point arguments diff --git a/gcc/config.gcc b/gcc/config.gcc index 6c62a64d25d..fafa8b87e07 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -3805,7 +3805,7 @@ case "${target}" in ;; powerpc*-*-* | rs6000-*-*) - supported_defaults="cpu cpu_32 cpu_64 float tune tune_32 tune_64" + supported_defaults="abi cpu cpu_32 cpu_64 float tune tune_32 tune_64" for which in cpu cpu_32 cpu_64 tune tune_32 tune_64; do eval "val=\$with_$which" @@ -3842,6 +3842,16 @@ case "${target}" in ;; esac done + + case "$with_abi" in + "" | elfv1 | elfv2 ) + #OK + ;; + *) + echo "Unknown ABI used in --with-abi=$with_abi" + exit 1 + ;; + esac ;; s390*-*-*) diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h index c1adbd78a4d..78e84531300 100644 --- a/gcc/config/rs6000/linux64.h +++ b/gcc/config/rs6000/linux64.h @@ -25,9 +25,6 @@ #ifndef RS6000_BI_ARCH -#undef DEFAULT_ABI -#define DEFAULT_ABI ABI_AIX - #undef TARGET_64BIT #define TARGET_64BIT 1 @@ -88,6 +85,12 @@ extern int dot_symbols; #define INVALID_64BIT "-m%s not supported in this configuration" #define INVALID_32BIT INVALID_64BIT +#ifdef LINUX64_DEFAULT_ABI_ELFv2 +#define ELFv2_ABI_CHECK (rs6000_elf_abi != 1) +#else +#define ELFv2_ABI_CHECK (rs6000_elf_abi == 2) +#endif + #undef SUBSUBTARGET_OVERRIDE_OPTIONS #define SUBSUBTARGET_OVERRIDE_OPTIONS \ do \ @@ -102,6 +105,12 @@ extern int dot_symbols; error (INVALID_64BIT, "call"); \ } \ dot_symbols = !strcmp (rs6000_abi_name, "aixdesc"); \ + if (ELFv2_ABI_CHECK) \ + { \ + rs6000_current_abi = ABI_ELFv2; \ + if (dot_symbols) \ + error ("-mcall-aixdesc incompatible with -mabi=elfv2"); \ + } \ if (rs6000_isa_flags & OPTION_MASK_RELOCATABLE) \ { \ rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE; \ @@ -355,7 +364,11 @@ extern int dot_symbols; #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)" #define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1" -#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld64.so.1" +#ifdef LINUX64_DEFAULT_ABI_ELFv2 +#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}" +#else +#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}" +#endif #define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0" #define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0" #if DEFAULT_LIBC == LIBC_UCLIBC diff --git a/gcc/config/rs6000/option-defaults.h b/gcc/config/rs6000/option-defaults.h index 2d7e36a6137..0d7ba1ea3ac 100644 --- a/gcc/config/rs6000/option-defaults.h +++ b/gcc/config/rs6000/option-defaults.h @@ -54,6 +54,7 @@ --with-float is ignored if -mhard-float or -msoft-float are specified. */ #define OPTION_DEFAULT_SPECS \ + {"abi", "%{!mabi=elfv*:-mabi=%(VALUE)}" }, \ {"tune", "%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}" }, \ {"tune_32", "%{" OPT_ARCH32 ":%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}}" }, \ {"tune_64", "%{" OPT_ARCH64 ":%{!mtune=*:%{!mcpu=*:-mtune=%(VALUE)}}}" }, \ diff --git a/gcc/config/rs6000/ppc-asm.h b/gcc/config/rs6000/ppc-asm.h index db490b6c9b8..8108efd07f5 100644 --- a/gcc/config/rs6000/ppc-asm.h +++ b/gcc/config/rs6000/ppc-asm.h @@ -256,7 +256,30 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see * the real function with one or two leading periods respectively. */ -#if defined (__powerpc64__) +#if defined(__powerpc64__) && _CALL_ELF == 2 + +/* Defining "toc" above breaks @toc in assembler code. */ +#undef toc + +#define FUNC_NAME(name) GLUE(__USER_LABEL_PREFIX__,name) +#define JUMP_TARGET(name) FUNC_NAME(name) +#define FUNC_START(name) \ + .type FUNC_NAME(name),@function; \ + .globl FUNC_NAME(name); \ +FUNC_NAME(name): \ +0: addis 2,12,(.TOC.-0b)@ha; \ + addi 2,2,(.TOC.-0b)@l; \ + .localentry FUNC_NAME(name),.-FUNC_NAME(name) + +#define HIDDEN_FUNC(name) \ + FUNC_START(name) \ + .hidden FUNC_NAME(name); + +#define FUNC_END(name) \ + .size FUNC_NAME(name),.-FUNC_NAME(name) + +#elif defined (__powerpc64__) + #define FUNC_NAME(name) GLUE(.,name) #define JUMP_TARGET(name) FUNC_NAME(name) #define FUNC_START(name) \ diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 3f46001daf6..c3118beb516 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -1050,7 +1050,8 @@ (and (match_code "symbol_ref") (match_test "(DEFAULT_ABI != ABI_AIX || SYMBOL_REF_FUNCTION_P (op)) && ((SYMBOL_REF_LOCAL_P (op) - && (DEFAULT_ABI != ABI_AIX + && ((DEFAULT_ABI != ABI_AIX + && DEFAULT_ABI != ABI_ELFv2) || !SYMBOL_REF_EXTERNAL_P (op))) || (op == XEXP (DECL_RTL (current_function_decl), 0)))"))) diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index d58e6865193..283cc917ae8 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -461,6 +461,10 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile) case ABI_AIX: builtin_define ("_CALL_AIXDESC"); builtin_define ("_CALL_AIX"); + builtin_define ("_CALL_ELF=1"); + break; + case ABI_ELFv2: + builtin_define ("_CALL_ELF=2"); break; case ABI_DARWIN: builtin_define ("_CALL_DARWIN"); @@ -473,6 +477,13 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile) if (TARGET_SOFT_FLOAT || !TARGET_FPRS) builtin_define ("__NO_FPRS__"); + /* Whether aggregates passed by value are aligned to a 16 byte boundary + if their alignment is 16 bytes or larger. */ + if ((TARGET_MACHO && rs6000_darwin64_abi) + || DEFAULT_ABI == ABI_ELFv2 + || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm)) + builtin_define ("__STRUCT_PARM_ALIGN__=16"); + /* Generate defines for Xilinx FPU. */ if (rs6000_xilinx_fpu) { diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h index d528a4fd87a..6d6d69379d5 100644 --- a/gcc/config/rs6000/rs6000-opts.h +++ b/gcc/config/rs6000/rs6000-opts.h @@ -107,7 +107,8 @@ enum group_termination /* Enumeration to give which calling sequence to use. */ enum rs6000_abi { ABI_NONE, - ABI_AIX, /* IBM's AIX */ + ABI_AIX, /* IBM's AIX, or Linux ELFv1 */ + ABI_ELFv2, /* Linux ELFv2 ABI */ ABI_V4, /* System V.4/eabi */ ABI_DARWIN /* Apple's Darwin (OS X kernel) */ }; diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 3c99c3ca416..2ad6f08f47d 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -158,6 +158,7 @@ extern tree altivec_resolve_overloaded_builtin (location_t, tree, void *); extern rtx rs6000_libcall_value (enum machine_mode); extern rtx rs6000_va_arg (tree, tree); extern int function_ok_for_sibcall (tree); +extern int rs6000_reg_parm_stack_space (tree); extern void rs6000_elf_declare_function_name (FILE *, const char *, tree); extern bool rs6000_elf_in_small_data_p (const_tree); #ifdef ARGS_SIZE_RTX diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 039868a1c15..c6b61717538 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -99,6 +99,7 @@ typedef struct rs6000_stack { int spe_gp_save_offset; /* offset to save spe 64-bit gprs */ int varargs_save_offset; /* offset to save the varargs registers */ int ehrd_offset; /* offset to EH return data */ + int ehcr_offset; /* offset to EH CR field data */ int reg_size; /* register size (4 or 8) */ HOST_WIDE_INT vars_size; /* variable save area size */ int parm_size; /* outgoing parameter size */ @@ -142,6 +143,8 @@ typedef struct GTY(()) machine_function 64-bits wide and is allocated early enough so that the offset does not overflow the 16-bit load/store offset field. */ rtx sdmode_stack_slot; + /* Flag if r2 setup is needed with ELFv2 ABI. */ + bool r2_setup_needed; } machine_function; /* Support targetm.vectorize.builtin_mask_for_load. */ @@ -1448,6 +1451,9 @@ static const struct attribute_spec rs6000_attribute_table[] = #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY rs6000_return_in_memory +#undef TARGET_RETURN_IN_MSB +#define TARGET_RETURN_IN_MSB rs6000_return_in_msb + #undef TARGET_SETUP_INCOMING_VARARGS #define TARGET_SETUP_INCOMING_VARARGS setup_incoming_varargs @@ -2236,6 +2242,7 @@ rs6000_debug_reg_global (void) { case ABI_NONE: abi_str = "none"; break; case ABI_AIX: abi_str = "aix"; break; + case ABI_ELFv2: abi_str = "ELFv2"; break; case ABI_V4: abi_str = "V4"; break; case ABI_DARWIN: abi_str = "darwin"; break; default: abi_str = "unknown"; break; @@ -4766,7 +4773,11 @@ rs6000_file_start (void) putc ('\n', file); } - if (DEFAULT_ABI == ABI_AIX || (TARGET_ELF && flag_pic == 2)) + if (DEFAULT_ABI == ABI_ELFv2) + fprintf (file, "\t.abiversion 2\n"); + + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2 + || (TARGET_ELF && flag_pic == 2)) { switch_to_section (toc_section); switch_to_section (text_section); @@ -6976,10 +6987,13 @@ rs6000_legitimize_tls_address (rtx addr, enum tls_model model) 1, const0_rtx, Pmode); r3 = gen_rtx_REG (Pmode, 3); - if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT) - insn = gen_tls_gd_aix64 (r3, got, addr, tga, const0_rtx); - else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT) - insn = gen_tls_gd_aix32 (r3, got, addr, tga, const0_rtx); + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) + { + if (TARGET_64BIT) + insn = gen_tls_gd_aix64 (r3, got, addr, tga, const0_rtx); + else + insn = gen_tls_gd_aix32 (r3, got, addr, tga, const0_rtx); + } else if (DEFAULT_ABI == ABI_V4) insn = gen_tls_gd_sysvsi (r3, got, addr, tga, const0_rtx); else @@ -6998,10 +7012,13 @@ rs6000_legitimize_tls_address (rtx addr, enum tls_model model) 1, const0_rtx, Pmode); r3 = gen_rtx_REG (Pmode, 3); - if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT) - insn = gen_tls_ld_aix64 (r3, got, tga, const0_rtx); - else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT) - insn = gen_tls_ld_aix32 (r3, got, tga, const0_rtx); + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) + { + if (TARGET_64BIT) + insn = gen_tls_ld_aix64 (r3, got, tga, const0_rtx); + else + insn = gen_tls_ld_aix32 (r3, got, tga, const0_rtx); + } else if (DEFAULT_ABI == ABI_V4) insn = gen_tls_ld_sysvsi (r3, got, tga, const0_rtx); else @@ -7628,7 +7645,7 @@ rs6000_conditional_register_usage (void) /* The TOC register is not killed across calls in a way that is visible to the compiler. */ - if (DEFAULT_ABI == ABI_AIX) + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) call_really_used_regs[2] = 0; if (DEFAULT_ABI == ABI_V4 @@ -8451,6 +8468,219 @@ rs6000_member_type_forces_blk (const_tree field, enum machine_mode mode) && TARGET_ALTIVEC_ABI \ && (NAMED)) +/* Walk down the type tree of TYPE counting consecutive base elements. + If *MODEP is VOIDmode, then set it to the first valid floating point + or vector type. If a non-floating point or vector type is found, or + if a floating point or vector type that doesn't match a non-VOIDmode + *MODEP is found, then return -1, otherwise return the count in the + sub-tree. */ + +static int +rs6000_aggregate_candidate (const_tree type, enum machine_mode *modep) +{ + enum machine_mode mode; + HOST_WIDE_INT size; + + switch (TREE_CODE (type)) + { + case REAL_TYPE: + mode = TYPE_MODE (type); + if (!SCALAR_FLOAT_MODE_P (mode)) + return -1; + + if (*modep == VOIDmode) + *modep = mode; + + if (*modep == mode) + return 1; + + break; + + case COMPLEX_TYPE: + mode = TYPE_MODE (TREE_TYPE (type)); + if (!SCALAR_FLOAT_MODE_P (mode)) + return -1; + + if (*modep == VOIDmode) + *modep = mode; + + if (*modep == mode) + return 2; + + break; + + case VECTOR_TYPE: + if (!TARGET_ALTIVEC_ABI || !TARGET_ALTIVEC) + return -1; + + /* Use V4SImode as representative of all 128-bit vector types. */ + size = int_size_in_bytes (type); + switch (size) + { + case 16: + mode = V4SImode; + break; + default: + return -1; + } + + if (*modep == VOIDmode) + *modep = mode; + + /* Vector modes are considered to be opaque: two vectors are + equivalent for the purposes of being homogeneous aggregates + if they are the same size. */ + if (*modep == mode) + return 1; + + break; + + case ARRAY_TYPE: + { + int count; + tree index = TYPE_DOMAIN (type); + + /* Can't handle incomplete types. */ + if (!COMPLETE_TYPE_P (type)) + return -1; + + count = rs6000_aggregate_candidate (TREE_TYPE (type), modep); + if (count == -1 + || !index + || !TYPE_MAX_VALUE (index) + || !host_integerp (TYPE_MAX_VALUE (index), 1) + || !TYPE_MIN_VALUE (index) + || !host_integerp (TYPE_MIN_VALUE (index), 1) + || count < 0) + return -1; + + count *= (1 + tree_low_cst (TYPE_MAX_VALUE (index), 1) + - tree_low_cst (TYPE_MIN_VALUE (index), 1)); + + /* There must be no padding. */ + if (!host_integerp (TYPE_SIZE (type), 1) + || (tree_low_cst (TYPE_SIZE (type), 1) + != count * GET_MODE_BITSIZE (*modep))) + return -1; + + return count; + } + + case RECORD_TYPE: + { + int count = 0; + int sub_count; + tree field; + + /* Can't handle incomplete types. */ + if (!COMPLETE_TYPE_P (type)) + return -1; + + for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field)) + { + if (TREE_CODE (field) != FIELD_DECL) + continue; + + sub_count = rs6000_aggregate_candidate (TREE_TYPE (field), modep); + if (sub_count < 0) + return -1; + count += sub_count; + } + + /* There must be no padding. */ + if (!host_integerp (TYPE_SIZE (type), 1) + || (tree_low_cst (TYPE_SIZE (type), 1) + != count * GET_MODE_BITSIZE (*modep))) + return -1; + + return count; + } + + case UNION_TYPE: + case QUAL_UNION_TYPE: + { + /* These aren't very interesting except in a degenerate case. */ + int count = 0; + int sub_count; + tree field; + + /* Can't handle incomplete types. */ + if (!COMPLETE_TYPE_P (type)) + return -1; + + for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field)) + { + if (TREE_CODE (field) != FIELD_DECL) + continue; + + sub_count = rs6000_aggregate_candidate (TREE_TYPE (field), modep); + if (sub_count < 0) + return -1; + count = count > sub_count ? count : sub_count; + } + + /* There must be no padding. */ + if (!host_integerp (TYPE_SIZE (type), 1) + || (tree_low_cst (TYPE_SIZE (type), 1) + != count * GET_MODE_BITSIZE (*modep))) + return -1; + + return count; + } + + default: + break; + } + + return -1; +} + +/* If an argument, whose type is described by TYPE and MODE, is a homogeneous + float or vector aggregate that shall be passed in FP/vector registers + according to the ELFv2 ABI, return the homogeneous element mode in + *ELT_MODE and the number of elements in *N_ELTS, and return TRUE. + + Otherwise, set *ELT_MODE to MODE and *N_ELTS to 1, and return FALSE. */ + +static bool +rs6000_discover_homogeneous_aggregate (enum machine_mode mode, const_tree type, + enum machine_mode *elt_mode, + int *n_elts) +{ + /* Note that we do not accept complex types at the top level as + homogeneous aggregates; these types are handled via the + targetm.calls.split_complex_arg mechanism. Complex types + can be elements of homogeneous aggregates, however. */ + if (DEFAULT_ABI == ABI_ELFv2 && type && AGGREGATE_TYPE_P (type)) + { + enum machine_mode field_mode = VOIDmode; + int field_count = rs6000_aggregate_candidate (type, &field_mode); + + if (field_count > 0) + { + int n_regs = (SCALAR_FLOAT_MODE_P (field_mode)? + (GET_MODE_SIZE (field_mode) + 7) >> 3 : 1); + + /* The ELFv2 ABI allows homogeneous aggregates to occupy + up to AGGR_ARG_NUM_REG registers. */ + if (field_count * n_regs <= AGGR_ARG_NUM_REG) + { + if (elt_mode) + *elt_mode = field_mode; + if (n_elts) + *n_elts = field_count; + return true; + } + } + } + + if (elt_mode) + *elt_mode = mode; + if (n_elts) + *n_elts = 1; + return false; +} + /* Return a nonzero value to say to return the function value in memory, just as large structures are always returned. TYPE will be the data type of the value, and FNTYPE will be the type of the @@ -8503,6 +8733,16 @@ rs6000_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) /* Otherwise fall through to more conventional ABI rules. */ } + /* The ELFv2 ABI returns homogeneous VFP aggregates in registers */ + if (rs6000_discover_homogeneous_aggregate (TYPE_MODE (type), type, + NULL, NULL)) + return false; + + /* The ELFv2 ABI returns aggregates up to 16B in registers */ + if (DEFAULT_ABI == ABI_ELFv2 && AGGREGATE_TYPE_P (type) + && (unsigned HOST_WIDE_INT) int_size_in_bytes (type) <= 16) + return false; + if (AGGREGATE_TYPE_P (type) && (aix_struct_return || (unsigned HOST_WIDE_INT) int_size_in_bytes (type) > 8)) @@ -8534,6 +8774,19 @@ rs6000_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) return false; } +/* Specify whether values returned in registers should be at the most + significant end of a register. We want aggregates returned by + value to match the way aggregates are passed to functions. */ + +static bool +rs6000_return_in_msb (const_tree valtype) +{ + return (DEFAULT_ABI == ABI_ELFv2 + && BYTES_BIG_ENDIAN + && AGGREGATE_TYPE_P (valtype) + && FUNCTION_ARG_PADDING (TYPE_MODE (valtype), valtype) == upward); +} + #ifdef HAVE_AS_GNU_ATTRIBUTE /* Return TRUE if a call to function FNDECL may be one that potentially affects the function calling ABI of the object file. */ @@ -8670,7 +8923,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, static bool rs6000_must_pass_in_stack (enum machine_mode mode, const_tree type) { - if (DEFAULT_ABI == ABI_AIX || TARGET_64BIT) + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2 || TARGET_64BIT) return must_pass_in_stack_var_size (mode, type); else return must_pass_in_stack_var_size_or_pad (mode, type); @@ -8751,6 +9004,11 @@ function_arg_padding (enum machine_mode mode, const_tree type) static unsigned int rs6000_function_arg_boundary (enum machine_mode mode, const_tree type) { + enum machine_mode elt_mode; + int n_elts; + + rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); + if (DEFAULT_ABI == ABI_V4 && (GET_MODE_SIZE (mode) == 8 || (TARGET_HARD_FLOAT @@ -8762,11 +9020,12 @@ rs6000_function_arg_boundary (enum machine_mode mode, const_tree type) && int_size_in_bytes (type) >= 8 && int_size_in_bytes (type) < 16)) return 64; - else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode) + else if (ALTIVEC_OR_VSX_VECTOR_MODE (elt_mode) || (type && TREE_CODE (type) == VECTOR_TYPE && int_size_in_bytes (type) >= 16)) return 128; else if (((TARGET_MACHO && rs6000_darwin64_abi) + || DEFAULT_ABI == ABI_ELFv2 || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm)) && mode == BLKmode && type && TYPE_ALIGN (type) > 64) @@ -8775,6 +9034,16 @@ rs6000_function_arg_boundary (enum machine_mode mode, const_tree type) return PARM_BOUNDARY; } +/* The offset in words to the start of the parameter save area. */ + +static unsigned int +rs6000_parm_offset (void) +{ + return (DEFAULT_ABI == ABI_V4 ? 2 + : DEFAULT_ABI == ABI_ELFv2 ? 4 + : 6); +} + /* For a function parm of MODE and TYPE, return the starting word in the parameter area. NWORDS of the parameter area are already used. */ @@ -8783,11 +9052,9 @@ rs6000_parm_start (enum machine_mode mode, const_tree type, unsigned int nwords) { unsigned int align; - unsigned int parm_offset; align = rs6000_function_arg_boundary (mode, type) / PARM_BOUNDARY - 1; - parm_offset = DEFAULT_ABI == ABI_V4 ? 2 : 6; - return nwords + (-(parm_offset + nwords) & align); + return nwords + (-(rs6000_parm_offset () + nwords) & align); } /* Compute the size (in words) of a function argument. */ @@ -8972,6 +9239,11 @@ static void rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode, const_tree type, bool named, int depth) { + enum machine_mode elt_mode; + int n_elts; + + rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); + /* Only tick off an argument if we're not recursing. */ if (depth == 0) cum->nargs_prototype--; @@ -8992,15 +9264,16 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode, #endif if (TARGET_ALTIVEC_ABI - && (ALTIVEC_OR_VSX_VECTOR_MODE (mode) + && (ALTIVEC_OR_VSX_VECTOR_MODE (elt_mode) || (type && TREE_CODE (type) == VECTOR_TYPE && int_size_in_bytes (type) == 16))) { bool stack = false; - if (USE_ALTIVEC_FOR_ARG_P (cum, mode, named)) + if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named)) { - cum->vregno++; + cum->vregno += n_elts; + if (!TARGET_ALTIVEC) error ("cannot pass argument in vector register because" " altivec instructions are disabled, use -maltivec" @@ -9009,7 +9282,8 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode, /* PowerPC64 Linux and AIX allocate GPRs for a vector argument even if it is going to be passed in a vector register. Darwin does the same for variable-argument functions. */ - if ((DEFAULT_ABI == ABI_AIX && TARGET_64BIT) + if (((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) + && TARGET_64BIT) || (cum->stdarg && DEFAULT_ABI != ABI_V4)) stack = true; } @@ -9020,15 +9294,13 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode, { int align; - /* Vector parameters must be 16-byte aligned. This places - them at 2 mod 4 in terms of words in 32-bit mode, since - the parameter save area starts at offset 24 from the - stack. In 64-bit mode, they just have to start on an - even word, since the parameter save area is 16-byte - aligned. Space for GPRs is reserved even if the argument - will be passed in memory. */ + /* Vector parameters must be 16-byte aligned. In 32-bit + mode this means we need to take into account the offset + to the parameter save area. In 64-bit mode, they just + have to start on an even word, since the parameter save + area is 16-byte aligned. */ if (TARGET_32BIT) - align = (2 - cum->words) & 3; + align = -(rs6000_parm_offset () + cum->words) & 3; else align = cum->words & 1; cum->words += align + rs6000_arg_size (mode, type); @@ -9153,15 +9425,15 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode, cum->words = align_words + n_words; - if (SCALAR_FLOAT_MODE_P (mode) + if (SCALAR_FLOAT_MODE_P (elt_mode) && TARGET_HARD_FLOAT && TARGET_FPRS) { /* _Decimal128 must be passed in an even/odd float register pair. This assumes that the register number is odd when fregno is odd. */ - if (mode == TDmode && (cum->fregno % 2) == 1) + if (elt_mode == TDmode && (cum->fregno % 2) == 1) cum->fregno++; - cum->fregno += (GET_MODE_SIZE (mode) + 7) >> 3; + cum->fregno += n_elts * ((GET_MODE_SIZE (elt_mode) + 7) >> 3); } if (TARGET_DEBUG_ARG) @@ -9532,6 +9804,7 @@ rs6000_psave_function_arg (enum machine_mode mode, const_tree type, int n_words = rs6000_arg_size (mode, type); if (align_words + n_words > GP_ARG_NUM_REG + || mode == BLKmode || (TARGET_32BIT && TARGET_POWERPC64)) { /* If this is partially on the stack, then we only @@ -9627,6 +9900,8 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); enum rs6000_abi abi = DEFAULT_ABI; + enum machine_mode elt_mode; + int n_elts; /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4 uses to say fp args were passed in registers. @@ -9653,6 +9928,8 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, return GEN_INT (cum->call_cookie & ~CALL_LIBCALL); } + rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); + if (TARGET_MACHO && rs6000_darwin64_struct_check_p (mode, type)) { rtx rslt = rs6000_darwin64_record_arg (cum, type, named, /*retval= */false); @@ -9661,11 +9938,11 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, /* Else fall through to usual handling. */ } - if (USE_ALTIVEC_FOR_ARG_P (cum, mode, named)) + if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named)) { - rtx rvec[GP_ARG_NUM_REG + 1]; - rtx r; - int k = 0; + rtx rvec[GP_ARG_NUM_REG + AGGR_ARG_NUM_REG + 1]; + rtx r, off; + int i, k = 0; /* Do we also need to pass this argument in the parameter save area? */ @@ -9676,8 +9953,12 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, } /* Describe where this argument goes in the vector registers. */ - r = gen_rtx_REG (mode, cum->vregno); - rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx); + for (i = 0; i < n_elts && cum->vregno + i <= ALTIVEC_ARG_MAX_REG; i++) + { + r = gen_rtx_REG (elt_mode, cum->vregno + i); + off = GEN_INT (i * GET_MODE_SIZE (elt_mode)); + rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off); + } return rs6000_finish_function_arg (mode, rvec, k); } @@ -9695,13 +9976,13 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, int align, align_words, n_words; enum machine_mode part_mode; - /* Vector parameters must be 16-byte aligned. This places them at - 2 mod 4 in terms of words in 32-bit mode, since the parameter - save area starts at offset 24 from the stack. In 64-bit mode, - they just have to start on an even word, since the parameter - save area is 16-byte aligned. */ + /* Vector parameters must be 16-byte aligned. In 32-bit + mode this means we need to take into account the offset + to the parameter save area. In 64-bit mode, they just + have to start on an even word, since the parameter save + area is 16-byte aligned. */ if (TARGET_32BIT) - align = (2 - cum->words) & 3; + align = -(rs6000_parm_offset () + cum->words) & 3; else align = cum->words & 1; align_words = cum->words + align; @@ -9779,38 +10060,42 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, /* _Decimal128 must be passed in an even/odd float register pair. This assumes that the register number is odd when fregno is odd. */ - if (mode == TDmode && (cum->fregno % 2) == 1) + if (elt_mode == TDmode && (cum->fregno % 2) == 1) cum->fregno++; - if (USE_FP_FOR_ARG_P (cum, mode)) + if (USE_FP_FOR_ARG_P (cum, elt_mode)) { - rtx rvec[GP_ARG_NUM_REG + 1]; - rtx r; - int k = 0; - enum machine_mode fmode = mode; - unsigned long n_fpreg = (GET_MODE_SIZE (mode) + 7) >> 3; + rtx rvec[GP_ARG_NUM_REG + AGGR_ARG_NUM_REG + 1]; + rtx r, off; + int i, k = 0; + unsigned long n_fpreg = (GET_MODE_SIZE (elt_mode) + 7) >> 3; /* Do we also need to pass this argument in the parameter save area? */ if (type && (cum->nargs_prototype <= 0 - || (DEFAULT_ABI == ABI_AIX + || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_XL_COMPAT && align_words >= GP_ARG_NUM_REG))) k = rs6000_psave_function_arg (mode, type, align_words, rvec); /* Describe where this argument goes in the fprs. */ - - /* Check if the argument is split over registers and memory. - This can only ever happen for long double or _Decimal128; - complex types are handled via split_complex_arg. */ - if (cum->fregno + n_fpreg > FP_ARG_MAX_REG + 1) + for (i = 0; i < n_elts + && cum->fregno + i * n_fpreg <= FP_ARG_MAX_REG; i++) { - gcc_assert (fmode == TFmode || fmode == TDmode); - fmode = DECIMAL_FLOAT_MODE_P (fmode) ? DDmode : DFmode; - } + /* Check if the argument is split over registers and memory. + This can only ever happen for long double or _Decimal128; + complex types are handled via split_complex_arg. */ + enum machine_mode fmode = elt_mode; + if (cum->fregno + (i + 1) * n_fpreg > FP_ARG_MAX_REG + 1) + { + gcc_assert (fmode == TFmode || fmode == TDmode); + fmode = DECIMAL_FLOAT_MODE_P (fmode) ? DDmode : DFmode; + } - r = gen_rtx_REG (fmode, cum->fregno); - rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx); + r = gen_rtx_REG (fmode, cum->fregno + i * n_fpreg); + off = GEN_INT (i * GET_MODE_SIZE (elt_mode)); + rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off); + } return rs6000_finish_function_arg (mode, rvec, k); } @@ -9819,9 +10104,6 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, if (TARGET_32BIT && TARGET_POWERPC64) return rs6000_mixed_function_arg (mode, type, align_words); - if (mode == BLKmode) - mode = Pmode; - return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); } else @@ -9843,11 +10125,15 @@ rs6000_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, bool passed_in_gprs = true; int ret = 0; int align_words; + enum machine_mode elt_mode; + int n_elts; + + rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); if (DEFAULT_ABI == ABI_V4) return 0; - if (USE_ALTIVEC_FOR_ARG_P (cum, mode, named)) + if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named)) { /* If we are passing this arg in the fixed parameter save area (gprs or memory) as well as VRs, we do not use the partial @@ -9856,8 +10142,10 @@ rs6000_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, if (TARGET_64BIT && ! cum->prototype) return 0; - /* Otherwise, we pass in VRs only. No partial copy possible. */ + /* Otherwise, we pass in VRs only. Check for partial copies. */ passed_in_gprs = false; + if (cum->vregno + n_elts > ALTIVEC_ARG_MAX_REG + 1) + ret = (ALTIVEC_ARG_MAX_REG + 1 - cum->vregno) * 16; } /* In this complicated case we just disable the partial_nregs code. */ @@ -9866,9 +10154,9 @@ rs6000_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, align_words = rs6000_parm_start (mode, type, cum->words); - if (USE_FP_FOR_ARG_P (cum, mode)) + if (USE_FP_FOR_ARG_P (cum, elt_mode)) { - unsigned long n_fpreg = (GET_MODE_SIZE (mode) + 7) >> 3; + unsigned long n_fpreg = (GET_MODE_SIZE (elt_mode) + 7) >> 3; /* If we are passing this arg in the fixed parameter save area (gprs or memory) as well as FPRs, we do not use the partial @@ -9876,15 +10164,16 @@ rs6000_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, PARALLEL including a memory element as necessary. */ if (type && (cum->nargs_prototype <= 0 - || (DEFAULT_ABI == ABI_AIX + || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_XL_COMPAT && align_words >= GP_ARG_NUM_REG))) return 0; /* Otherwise, we pass in FPRs only. Check for partial copies. */ passed_in_gprs = false; - if (cum->fregno + n_fpreg > FP_ARG_MAX_REG + 1) - ret = (FP_ARG_MAX_REG + 1 - cum->fregno) * 8; + if (cum->fregno + n_elts * n_fpreg > FP_ARG_MAX_REG + 1) + ret = ((FP_ARG_MAX_REG + 1 - cum->fregno) + * MIN (8, GET_MODE_SIZE (elt_mode))); } if (passed_in_gprs @@ -9969,6 +10258,139 @@ rs6000_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, return 0; } +/* Process parameter of type TYPE after ARGS_SO_FAR parameters were + already processes. Return true if the parameter must be passed + (fully or partially) on the stack. */ + +static bool +rs6000_parm_needs_stack (cumulative_args_t args_so_far, tree type) +{ + enum machine_mode mode; + int unsignedp; + rtx entry_parm; + + /* Catch errors. */ + if (type == NULL || type == error_mark_node) + return true; + + /* Handle types with no storage requirement. */ + if (TYPE_MODE (type) == VOIDmode) + return false; + + /* Handle complex types. */ + if (TREE_CODE (type) == COMPLEX_TYPE) + return (rs6000_parm_needs_stack (args_so_far, TREE_TYPE (type)) + || rs6000_parm_needs_stack (args_so_far, TREE_TYPE (type))); + + /* Handle transparent aggregates. */ + if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE) + && TYPE_TRANSPARENT_AGGR (type)) + type = TREE_TYPE (first_field (type)); + + /* See if this arg was passed by invisible reference. */ + if (pass_by_reference (get_cumulative_args (args_so_far), + TYPE_MODE (type), type, true)) + type = build_pointer_type (type); + + /* Find mode as it is passed by the ABI. */ + unsignedp = TYPE_UNSIGNED (type); + mode = promote_mode (type, TYPE_MODE (type), &unsignedp); + + /* If we must pass in stack, we need a stack. */ + if (rs6000_must_pass_in_stack (mode, type)) + return true; + + /* If there is no incoming register, we need a stack. */ + entry_parm = rs6000_function_arg (args_so_far, mode, type, true); + if (entry_parm == NULL) + return true; + + /* Likewise if we need to pass both in registers and on the stack. */ + if (GET_CODE (entry_parm) == PARALLEL + && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX) + return true; + + /* Also true if we're partially in registers and partially not. */ + if (rs6000_arg_partial_bytes (args_so_far, mode, type, true) != 0) + return true; + + /* Update info on where next arg arrives in registers. */ + rs6000_function_arg_advance (args_so_far, mode, type, true); + return false; +} + +/* Return true if FUN has no prototype, has a variable argument + list, or passes any parameter in memory. */ + +static bool +rs6000_function_parms_need_stack (tree fun) +{ + function_args_iterator args_iter; + tree arg_type; + CUMULATIVE_ARGS args_so_far_v; + cumulative_args_t args_so_far; + + if (!fun) + /* Must be a libcall, all of which only use reg parms. */ + return false; + if (!TYPE_P (fun)) + fun = TREE_TYPE (fun); + + /* Varargs functions need the parameter save area. */ + if (!prototype_p (fun) || stdarg_p (fun)) + return true; + + INIT_CUMULATIVE_INCOMING_ARGS (args_so_far_v, fun, NULL_RTX); + args_so_far = pack_cumulative_args (&args_so_far_v); + + if (aggregate_value_p (TREE_TYPE (fun), fun)) + { + tree type = build_pointer_type (TREE_TYPE (fun)); + rs6000_parm_needs_stack (args_so_far, type); + } + + FOREACH_FUNCTION_ARGS (fun, arg_type, args_iter) + if (rs6000_parm_needs_stack (args_so_far, arg_type)) + return true; + + return false; +} + +/* Return the size of the REG_PARM_STACK_SPACE are for FUN. This is + usually a constant depending on the ABI. However, in the ELFv2 ABI + the register parameter area is optional when calling a function that + has a prototype is scope, has no variable argument list, and passes + all parameters in registers. */ + +int +rs6000_reg_parm_stack_space (tree fun) +{ + int reg_parm_stack_space; + + switch (DEFAULT_ABI) + { + default: + reg_parm_stack_space = 0; + break; + + case ABI_AIX: + case ABI_DARWIN: + reg_parm_stack_space = TARGET_64BIT ? 64 : 32; + break; + + case ABI_ELFv2: + /* ??? Recomputing this every time is a bit expensive. Is there + a place to cache this information? */ + if (rs6000_function_parms_need_stack (fun)) + reg_parm_stack_space = TARGET_64BIT ? 64 : 32; + else + reg_parm_stack_space = 0; + break; + } + + return reg_parm_stack_space; +} + static void rs6000_move_block_from_reg (int regno, rtx x, int nregs) { @@ -10348,6 +10770,7 @@ rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, if (((TARGET_MACHO && rs6000_darwin64_abi) + || DEFAULT_ABI == ABI_ELFv2 || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm)) && integer_zerop (TYPE_SIZE (type))) { @@ -16678,6 +17101,7 @@ rs6000_output_function_entry (FILE *file, const char *fname) ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "L."); break; + case ABI_ELFv2: case ABI_V4: case ABI_DARWIN: break; @@ -19630,7 +20054,7 @@ rs6000_savres_strategy (rs6000_stack_t *info, } else { - gcc_checking_assert (DEFAULT_ABI == ABI_AIX); + gcc_checking_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2); if (info->first_fp_reg_save > 61) strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS; strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS; @@ -19775,6 +20199,34 @@ rs6000_savres_strategy (rs6000_stack_t *info, The required alignment for AIX configurations is two words (i.e., 8 or 16 bytes). + The ELFv2 ABI is a variant of the AIX ABI. Stack frames look like: + + SP----> +---------------------------------------+ + | Back chain to caller | 0 + +---------------------------------------+ + | Save area for CR | 8 + +---------------------------------------+ + | Saved LR | 16 + +---------------------------------------+ + | Saved TOC pointer | 24 + +---------------------------------------+ + | Parameter save area (P) | 32 + +---------------------------------------+ + | Alloca space (A) | 32+P + +---------------------------------------+ + | Local variable space (L) | 32+P+A + +---------------------------------------+ + | Save area for AltiVec registers (W) | 32+P+A+L + +---------------------------------------+ + | AltiVec alignment padding (Y) | 32+P+A+L+W + +---------------------------------------+ + | Save area for GP registers (G) | 32+P+A+L+W+Y + +---------------------------------------+ + | Save area for FP registers (F) | 32+P+A+L+W+Y+G + +---------------------------------------+ + old SP->| back chain to caller's caller | 32+P+A+L+W+Y+G+F + +---------------------------------------+ + V.4 stack frames look like: @@ -19835,6 +20287,7 @@ rs6000_stack_info (void) rs6000_stack_t *info_ptr = &stack_info; int reg_size = TARGET_32BIT ? 4 : 8; int ehrd_size; + int ehcr_size; int save_align; int first_gp; HOST_WIDE_INT non_fixed_size; @@ -19928,6 +20381,18 @@ rs6000_stack_info (void) else ehrd_size = 0; + /* In the ELFv2 ABI, we also need to allocate space for separate + CR field save areas if the function calls __builtin_eh_return. */ + if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return) + { + /* This hard-codes that we have three call-saved CR fields. */ + ehcr_size = 3 * reg_size; + /* We do *not* use the regular CR save mechanism. */ + info_ptr->cr_save_p = 0; + } + else + ehcr_size = 0; + /* Determine various sizes. */ info_ptr->reg_size = reg_size; info_ptr->fixed_size = RS6000_SAVE_AREA; @@ -19967,6 +20432,7 @@ rs6000_stack_info (void) gcc_unreachable (); case ABI_AIX: + case ABI_ELFv2: case ABI_DARWIN: info_ptr->fp_save_offset = - info_ptr->fp_size; info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; @@ -19996,6 +20462,8 @@ rs6000_stack_info (void) } else info_ptr->ehrd_offset = info_ptr->gp_save_offset - ehrd_size; + + info_ptr->ehcr_offset = info_ptr->ehrd_offset - ehcr_size; info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */ info_ptr->lr_save_offset = 2*reg_size; break; @@ -20058,6 +20526,7 @@ rs6000_stack_info (void) + info_ptr->spe_gp_size + info_ptr->spe_padding_size + ehrd_size + + ehcr_size + info_ptr->cr_size + info_ptr->vrsave_size, save_align); @@ -20071,7 +20540,7 @@ rs6000_stack_info (void) /* Determine if we need to save the link register. */ if (info_ptr->calls_p - || (DEFAULT_ABI == ABI_AIX + || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && crtl->profile && !TARGET_PROFILE_KERNEL) || (DEFAULT_ABI == ABI_V4 && cfun->calls_alloca) @@ -20217,6 +20686,7 @@ debug_stack_info (rs6000_stack_t *info) default: abi_string = "Unknown"; break; case ABI_NONE: abi_string = "NONE"; break; case ABI_AIX: abi_string = "AIX"; break; + case ABI_ELFv2: abi_string = "ELFv2"; break; case ABI_DARWIN: abi_string = "Darwin"; break; case ABI_V4: abi_string = "V.4"; break; } @@ -20398,13 +20868,13 @@ rs6000_function_ok_for_sibcall (tree decl, tree exp) return false; } - /* Under the AIX ABI we can't allow calls to non-local functions, - because the callee may have a different TOC pointer to the - caller and there's no way to ensure we restore the TOC when we - return. With the secure-plt SYSV ABI we can't make non-local + /* Under the AIX or ELFv2 ABIs we can't allow calls to non-local + functions, because the callee may have a different TOC pointer to + the caller and there's no way to ensure we restore the TOC when + we return. With the secure-plt SYSV ABI we can't make non-local calls when -fpic/PIC because the plt call stubs use r30. */ if (DEFAULT_ABI == ABI_DARWIN - || (DEFAULT_ABI == ABI_AIX + || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && decl && !DECL_EXTERNAL (decl) && (*targetm.binds_local_p) (decl)) @@ -20563,7 +21033,7 @@ rs6000_emit_load_toc_table (int fromprolog) } else { - gcc_assert (DEFAULT_ABI == ABI_AIX); + gcc_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2); if (TARGET_32BIT) emit_insn (gen_load_toc_aix_si (dest)); @@ -21282,7 +21752,7 @@ rs6000_savres_routine_name (rs6000_stack_t *info, int regno, int sel) if ((sel & SAVRES_LR)) suffix = "_x"; } - else if (DEFAULT_ABI == ABI_AIX) + else if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) { #if !defined (POWERPC_LINUX) && !defined (POWERPC_FREEBSD) /* No out-of-line save/restore routines for GPRs on AIX. */ @@ -21423,7 +21893,7 @@ rs6000_emit_stack_reset (rs6000_stack_t *info, static inline unsigned ptr_regno_for_savres (int sel) { - if (DEFAULT_ABI == ABI_AIX) + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) return (sel & SAVRES_REG) == SAVRES_FPR || (sel & SAVRES_LR) ? 1 : 12; return DEFAULT_ABI == ABI_DARWIN && (sel & SAVRES_REG) == SAVRES_FPR ? 1 : 11; } @@ -21508,6 +21978,43 @@ rs6000_emit_savres_rtx (rs6000_stack_t *info, return insn; } +/* Emit code to store CR fields that need to be saved into REG. */ + +static void +rs6000_emit_move_from_cr (rtx reg) +{ + /* Only the ELFv2 ABI allows storing only selected fields. */ + if (DEFAULT_ABI == ABI_ELFv2 && TARGET_MFCRF) + { + int i, cr_reg[8], count = 0; + + /* Collect CR fields that must be saved. */ + for (i = 0; i < 8; i++) + if (save_reg_p (CR0_REGNO + i)) + cr_reg[count++] = i; + + /* If it's just a single one, use mfcrf. */ + if (count == 1) + { + rtvec p = rtvec_alloc (1); + rtvec r = rtvec_alloc (2); + RTVEC_ELT (r, 0) = gen_rtx_REG (CCmode, CR0_REGNO + cr_reg[0]); + RTVEC_ELT (r, 1) = GEN_INT (1 << (7 - cr_reg[0])); + RTVEC_ELT (p, 0) + = gen_rtx_SET (VOIDmode, reg, + gen_rtx_UNSPEC (SImode, r, UNSPEC_MOVESI_FROM_CR)); + + emit_insn (gen_rtx_PARALLEL (VOIDmode, p)); + return; + } + + /* ??? It might be better to handle count == 2 / 3 cases here + as well, using logical operations to combine the values. */ + } + + emit_insn (gen_movesi_from_cr (reg)); +} + /* Determine whether the gp REG is really used. */ static bool @@ -21573,6 +22080,17 @@ rs6000_emit_prologue (void) #define NOT_INUSE(R) do {} while (0) #endif + if (DEFAULT_ABI == ABI_ELFv2) + { + cfun->machine->r2_setup_needed = df_regs_ever_live_p (TOC_REGNUM); + + /* With -mminimal-toc we may generate an extra use of r2 below. */ + if (!TARGET_SINGLE_PIC_BASE + && TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) + cfun->machine->r2_setup_needed = true; + } + + if (flag_stack_usage_info) current_function_static_stack_size = info->total_size; @@ -21790,7 +22308,7 @@ rs6000_emit_prologue (void) /* If we need to save CR, put it into r12 or r11. Choose r12 except when r12 will be needed by out-of-line gpr restore. */ - cr_save_regno = (DEFAULT_ABI == ABI_AIX + cr_save_regno = ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && !(strategy & (SAVE_INLINE_GPRS | SAVE_NOINLINE_GPRS_SAVES_LR)) ? 11 : 12); @@ -21801,7 +22319,7 @@ rs6000_emit_prologue (void) { cr_save_rtx = gen_rtx_REG (SImode, cr_save_regno); START_USE (cr_save_regno); - emit_insn (gen_movesi_from_cr (cr_save_rtx)); + rs6000_emit_move_from_cr (cr_save_rtx); } /* Do any required saving of fpr's. If only one or two to save, do @@ -22053,7 +22571,8 @@ rs6000_emit_prologue (void) be updated if we arrived at this function via a plt call or toc adjusting stub. */ emit_move_insn (tmp_reg_si, gen_rtx_MEM (SImode, tmp_reg)); - toc_restore_insn = TARGET_32BIT ? 0x80410014 : 0xE8410028; + toc_restore_insn = ((TARGET_32BIT ? 0x80410000 : 0xE8410000) + + RS6000_TOC_SAVE_SLOT); hi = gen_int_mode (toc_restore_insn & ~0xffff, SImode); emit_insn (gen_xorsi3 (tmp_reg_si, tmp_reg_si, hi)); compare_result = gen_rtx_REG (CCUNSmode, CR0_REGNO); @@ -22072,7 +22591,7 @@ rs6000_emit_prologue (void) LABEL_NUSES (toc_save_done) += 1; save_insn = emit_frame_save (frame_reg_rtx, reg_mode, - TOC_REGNUM, frame_off + 5 * reg_size, + TOC_REGNUM, frame_off + RS6000_TOC_SAVE_SLOT, sp_off - frame_off); emit_label (toc_save_done); @@ -22118,7 +22637,7 @@ rs6000_emit_prologue (void) { START_USE (0); cr_save_rtx = gen_rtx_REG (SImode, 0); - emit_insn (gen_movesi_from_cr (cr_save_rtx)); + rs6000_emit_move_from_cr (cr_save_rtx); } /* Saving CR requires a two-instruction sequence: one instruction @@ -22162,12 +22681,71 @@ rs6000_emit_prologue (void) GEN_INT (info->cr_save_offset + sp_off)); mem = gen_frame_mem (SImode, addr); - /* We still cannot express that multiple CR fields are saved in the - CR save slot. By convention, we use a single CR regnum to represent - the fact that all call-saved CR fields are saved. We use CR2_REGNO - to be compatible with gcc-2.95 on Linux. */ - rtx set = gen_rtx_SET (VOIDmode, mem, gen_rtx_REG (SImode, CR2_REGNO)); - add_reg_note (insn, REG_FRAME_RELATED_EXPR, set); + if (DEFAULT_ABI == ABI_ELFv2) + { + /* In the ELFv2 ABI we generate separate CFI records for each + CR field that was actually saved. They all point to the + same 32-bit stack slot. */ + rtx crframe[8]; + int n_crframe = 0; + + for (i = 0; i < 8; i++) + if (save_reg_p (CR0_REGNO + i)) + { + crframe[n_crframe] + = gen_rtx_SET (VOIDmode, mem, + gen_rtx_REG (SImode, CR0_REGNO + i)); + + RTX_FRAME_RELATED_P (crframe[n_crframe]) = 1; + n_crframe++; + } + + add_reg_note (insn, REG_FRAME_RELATED_EXPR, + gen_rtx_PARALLEL (VOIDmode, + gen_rtvec_v (n_crframe, crframe))); + } + else + { + /* In other ABIs, by convention, we use a single CR regnum to + represent the fact that all call-saved CR fields are saved. + We use CR2_REGNO to be compatible with gcc-2.95 on Linux. */ + rtx set = gen_rtx_SET (VOIDmode, mem, + gen_rtx_REG (SImode, CR2_REGNO)); + add_reg_note (insn, REG_FRAME_RELATED_EXPR, set); + } + } + + /* In the ELFv2 ABI we need to save all call-saved CR fields into + *separate* slots if the routine calls __builtin_eh_return, so + that they can be independently restored by the unwinder. */ + if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return) + { + int i, cr_off = info->ehcr_offset; + rtx crsave; + + /* ??? We might get better performance by using multiple mfocrf + instructions. */ + crsave = gen_rtx_REG (SImode, 0); + emit_insn (gen_movesi_from_cr (crsave)); + + for (i = 0; i < 8; i++) + if (!call_used_regs[CR0_REGNO + i]) + { + rtvec p = rtvec_alloc (2); + RTVEC_ELT (p, 0) + = gen_frame_store (crsave, frame_reg_rtx, cr_off + frame_off); + RTVEC_ELT (p, 1) + = gen_rtx_USE (VOIDmode, gen_rtx_REG (CCmode, CR0_REGNO + i)); + + insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p)); + + RTX_FRAME_RELATED_P (insn) = 1; + add_reg_note (insn, REG_FRAME_RELATED_EXPR, + gen_frame_store (gen_rtx_REG (SImode, CR0_REGNO + i), + sp_reg_rtx, cr_off + sp_off)); + + cr_off += reg_size; + } } /* Update stack and set back pointer unless this is V.4, @@ -22306,7 +22884,8 @@ rs6000_emit_prologue (void) be using r12 as frame_reg_rtx and r11 as the static chain pointer for nested functions. */ save_regno = 12; - if (DEFAULT_ABI == ABI_AIX && !using_static_chain_p) + if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) + && !using_static_chain_p) save_regno = 11; else if (REGNO (frame_reg_rtx) == 12) { @@ -22407,7 +22986,7 @@ rs6000_emit_prologue (void) if (rs6000_save_toc_in_prologue_p ()) { rtx reg = gen_rtx_REG (reg_mode, TOC_REGNUM); - emit_insn (gen_frame_store (reg, sp_reg_rtx, 5 * reg_size)); + emit_insn (gen_frame_store (reg, sp_reg_rtx, RS6000_TOC_SAVE_SLOT)); } } @@ -22448,6 +23027,49 @@ rs6000_output_function_prologue (FILE *file, } } + /* ELFv2 ABI r2 setup code and local entry point. This must follow + immediately after the global entry point label. */ + if (DEFAULT_ABI == ABI_ELFv2 && cfun->machine->r2_setup_needed) + { + const char *name = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); + + fprintf (file, "0:\taddis 2,12,.TOC.-0b@ha\n"); + fprintf (file, "\taddi 2,2,.TOC.-0b@l\n"); + + fputs ("\t.localentry\t", file); + assemble_name (file, name); + fputs (",.-", file); + assemble_name (file, name); + fputs ("\n", file); + } + + /* Output -mprofile-kernel code. This needs to be done here instead of + in output_function_profile since it must go after the ELFv2 ABI + local entry point. */ + if (TARGET_PROFILE_KERNEL) + { + gcc_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2); + gcc_assert (!TARGET_32BIT); + + asm_fprintf (file, "\tmflr %s\n", reg_names[0]); + asm_fprintf (file, "\tstd %s,16(%s)\n", reg_names[0], reg_names[1]); + + /* In the ELFv2 ABI we have no compiler stack word. It must be + the resposibility of _mcount to preserve the static chain + register if required. */ + if (DEFAULT_ABI != ABI_ELFv2 + && cfun->static_chain_decl != NULL) + { + asm_fprintf (file, "\tstd %s,24(%s)\n", + reg_names[STATIC_CHAIN_REGNUM], reg_names[1]); + fprintf (file, "\tbl %s\n", RS6000_MCOUNT); + asm_fprintf (file, "\tld %s,24(%s)\n", + reg_names[STATIC_CHAIN_REGNUM], reg_names[1]); + } + else + fprintf (file, "\tbl %s\n", RS6000_MCOUNT); + } + rs6000_pic_labelno++; } @@ -22500,6 +23122,7 @@ restore_saved_cr (rtx reg, int using_mfcr_multiple, bool exit_func) if (using_mfcr_multiple && count > 1) { + rtx insn; rtvec p; int ndx; @@ -22517,16 +23140,43 @@ restore_saved_cr (rtx reg, int using_mfcr_multiple, bool exit_func) gen_rtx_UNSPEC (CCmode, r, UNSPEC_MOVESI_TO_CR)); ndx++; } - emit_insn (gen_rtx_PARALLEL (VOIDmode, p)); + insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p)); gcc_assert (ndx == count); + + /* For the ELFv2 ABI we generate a CFA_RESTORE for each + CR field separately. */ + if (!exit_func && DEFAULT_ABI == ABI_ELFv2 && flag_shrink_wrap) + { + for (i = 0; i < 8; i++) + if (save_reg_p (CR0_REGNO + i)) + add_reg_note (insn, REG_CFA_RESTORE, + gen_rtx_REG (SImode, CR0_REGNO + i)); + + RTX_FRAME_RELATED_P (insn) = 1; + } } else for (i = 0; i < 8; i++) if (save_reg_p (CR0_REGNO + i)) - emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode, CR0_REGNO + i), - reg)); + { + rtx insn = emit_insn (gen_movsi_to_cr_one + (gen_rtx_REG (CCmode, CR0_REGNO + i), reg)); + + /* For the ELFv2 ABI we generate a CFA_RESTORE for each + CR field separately, attached to the insn that in fact + restores this particular CR field. */ + if (!exit_func && DEFAULT_ABI == ABI_ELFv2 && flag_shrink_wrap) + { + add_reg_note (insn, REG_CFA_RESTORE, + gen_rtx_REG (SImode, CR0_REGNO + i)); - if (!exit_func && (DEFAULT_ABI == ABI_V4 || flag_shrink_wrap)) + RTX_FRAME_RELATED_P (insn) = 1; + } + } + + /* For other ABIs, we just generate a single CFA_RESTORE for CR2. */ + if (!exit_func && DEFAULT_ABI != ABI_ELFv2 + && (DEFAULT_ABI == ABI_V4 || flag_shrink_wrap)) { rtx insn = get_last_insn (); rtx cr = gen_rtx_REG (SImode, CR2_REGNO); @@ -22567,10 +23217,22 @@ restore_saved_lr (int regno, bool exit_func) static rtx add_crlr_cfa_restore (const rs6000_stack_t *info, rtx cfa_restores) { - if (info->cr_save_p) + if (DEFAULT_ABI == ABI_ELFv2) + { + int i; + for (i = 0; i < 8; i++) + if (save_reg_p (CR0_REGNO + i)) + { + rtx cr = gen_rtx_REG (SImode, CR0_REGNO + i); + cfa_restores = alloc_reg_note (REG_CFA_RESTORE, cr, + cfa_restores); + } + } + else if (info->cr_save_p) cfa_restores = alloc_reg_note (REG_CFA_RESTORE, gen_rtx_REG (SImode, CR2_REGNO), cfa_restores); + if (info->lr_save_p) cfa_restores = alloc_reg_note (REG_CFA_RESTORE, gen_rtx_REG (Pmode, LR_REGNO), @@ -23068,6 +23730,35 @@ rs6000_emit_epilogue (int sibcall) || (!restoring_GPRs_inline && info->first_fp_reg_save == 64)); + /* In the ELFv2 ABI we need to restore all call-saved CR fields from + *separate* slots if the routine calls __builtin_eh_return, so + that they can be independently restored by the unwinder. */ + if (DEFAULT_ABI == ABI_ELFv2 && crtl->calls_eh_return) + { + int i, cr_off = info->ehcr_offset; + + for (i = 0; i < 8; i++) + if (!call_used_regs[CR0_REGNO + i]) + { + rtx reg = gen_rtx_REG (SImode, 0); + emit_insn (gen_frame_load (reg, frame_reg_rtx, + cr_off + frame_off)); + + insn = emit_insn (gen_movsi_to_cr_one + (gen_rtx_REG (CCmode, CR0_REGNO + i), reg)); + + if (!exit_func && flag_shrink_wrap) + { + add_reg_note (insn, REG_CFA_RESTORE, + gen_rtx_REG (SImode, CR0_REGNO + i)); + + RTX_FRAME_RELATED_P (insn) = 1; + } + + cr_off += reg_size; + } + } + /* Get the old lr if we saved it. If we are restoring registers out-of-line, then the out-of-line routines can do this for us. */ if (restore_lr && restoring_GPRs_inline) @@ -23111,7 +23802,7 @@ rs6000_emit_epilogue (int sibcall) { rtx reg = gen_rtx_REG (reg_mode, 2); emit_insn (gen_frame_load (reg, frame_reg_rtx, - frame_off + 5 * reg_size)); + frame_off + RS6000_TOC_SAVE_SLOT)); } for (i = 0; ; ++i) @@ -23397,6 +24088,7 @@ rs6000_emit_epilogue (int sibcall) if (! restoring_FPRs_inline) { int i; + int reg; rtx sym; if (flag_shrink_wrap) @@ -23405,10 +24097,9 @@ rs6000_emit_epilogue (int sibcall) sym = rs6000_savres_routine_sym (info, SAVRES_FPR | (lr ? SAVRES_LR : 0)); RTVEC_ELT (p, 2) = gen_rtx_USE (VOIDmode, sym); - RTVEC_ELT (p, 3) = gen_rtx_USE (VOIDmode, - gen_rtx_REG (Pmode, - DEFAULT_ABI == ABI_AIX - ? 1 : 11)); + reg = (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)? 1 : 11; + RTVEC_ELT (p, 3) = gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, reg)); + for (i = 0; i < 64 - info->first_fp_reg_save; i++) { rtx reg = gen_rtx_REG (DFmode, info->first_fp_reg_save + i); @@ -23486,7 +24177,8 @@ rs6000_output_function_epilogue (FILE *file, System V.4 Powerpc's (and the embedded ABI derived from it) use a different traceback table. */ - if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive + if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) + && ! flag_inhibit_size_directive && rs6000_traceback != traceback_none && !cfun->is_thunk) { const char *fname = NULL; @@ -23814,6 +24506,12 @@ rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, SIBLING_CALL_P (insn) = 1; emit_barrier (); + /* Ensure we have a global entry point for the thunk. ??? We could + avoid that if the target routine doesn't need a global entry point, + but we do not know whether this is the case at this point. */ + if (DEFAULT_ABI == ABI_ELFv2) + cfun->machine->r2_setup_needed = true; + /* Run just enough of rest_of_compilation to get the insns emitted. There's not really enough bulk here to make other passes such as instruction scheduling worth while. Note that use_thunk calls @@ -24489,7 +25187,7 @@ output_profile_hook (int labelno ATTRIBUTE_UNUSED) if (TARGET_PROFILE_KERNEL) return; - if (DEFAULT_ABI == ABI_AIX) + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) { #ifndef NO_PROFILE_COUNTERS # define NO_PROFILE_COUNTERS 0 @@ -24633,29 +25331,9 @@ output_function_profiler (FILE *file, int labelno) break; case ABI_AIX: + case ABI_ELFv2: case ABI_DARWIN: - if (!TARGET_PROFILE_KERNEL) - { - /* Don't do anything, done in output_profile_hook (). */ - } - else - { - gcc_assert (!TARGET_32BIT); - - asm_fprintf (file, "\tmflr %s\n", reg_names[0]); - asm_fprintf (file, "\tstd %s,16(%s)\n", reg_names[0], reg_names[1]); - - if (cfun->static_chain_decl != NULL) - { - asm_fprintf (file, "\tstd %s,24(%s)\n", - reg_names[STATIC_CHAIN_REGNUM], reg_names[1]); - fprintf (file, "\tbl %s\n", RS6000_MCOUNT); - asm_fprintf (file, "\tld %s,24(%s)\n", - reg_names[STATIC_CHAIN_REGNUM], reg_names[1]); - } - else - fprintf (file, "\tbl %s\n", RS6000_MCOUNT); - } + /* Don't do anything, done in output_profile_hook (). */ break; } } @@ -26591,6 +27269,11 @@ rs6000_trampoline_size (void) ret = (TARGET_32BIT) ? 12 : 24; break; + case ABI_ELFv2: + gcc_assert (!TARGET_32BIT); + ret = 32; + break; + case ABI_DARWIN: case ABI_V4: ret = (TARGET_32BIT) ? 40 : 48; @@ -26646,6 +27329,7 @@ rs6000_trampoline_init (rtx m_tramp, tree fndecl, rtx cxt) break; /* Under V.4/eabi/darwin, __trampoline_setup does the real work. */ + case ABI_ELFv2: case ABI_DARWIN: case ABI_V4: emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__trampoline_setup"), @@ -26940,7 +27624,7 @@ rs6000_ms_bitfield_layout_p (const_tree record_type) static void rs6000_elf_output_toc_section_asm_op (const void *data ATTRIBUTE_UNUSED) { - if (DEFAULT_ABI == ABI_AIX + if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_MINIMAL_TOC && !TARGET_RELOCATABLE) { @@ -26961,7 +27645,8 @@ rs6000_elf_output_toc_section_asm_op (const void *data ATTRIBUTE_UNUSED) else fprintf (asm_out_file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); } - else if (DEFAULT_ABI == ABI_AIX && !TARGET_RELOCATABLE) + else if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) + && !TARGET_RELOCATABLE) fprintf (asm_out_file, "%s\n", TOC_SECTION_ASM_OP); else { @@ -27511,7 +28196,7 @@ rs6000_elf_reloc_rw_mask (void) { if (flag_pic) return 3; - else if (DEFAULT_ABI == ABI_AIX) + else if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) return 2; else return 0; @@ -27587,7 +28272,7 @@ rs6000_elf_asm_out_destructor (rtx symbol, int priority) void rs6000_elf_declare_function_name (FILE *file, const char *name, tree decl) { - if (TARGET_64BIT) + if (TARGET_64BIT && DEFAULT_ABI != ABI_ELFv2) { fputs ("\t.section\t\".opd\",\"aw\"\n\t.align 3\n", file); ASM_OUTPUT_LABEL (file, name); @@ -27682,7 +28367,7 @@ rs6000_elf_file_end (void) } #endif #if defined (POWERPC_LINUX) || defined (POWERPC_FREEBSD) - if (TARGET_32BIT) + if (TARGET_32BIT || DEFAULT_ABI == ABI_ELFv2) file_end_indicate_exec_stack (); #endif } @@ -29412,6 +30097,8 @@ rs6000_function_value (const_tree valtype, { enum machine_mode mode; unsigned int regno; + enum machine_mode elt_mode; + int n_elts; /* Special handling for structs in darwin64. */ if (TARGET_MACHO @@ -29431,6 +30118,36 @@ rs6000_function_value (const_tree valtype, /* Otherwise fall through to standard ABI rules. */ } + /* The ELFv2 ABI returns homogeneous VFP aggregates in registers. */ + if (rs6000_discover_homogeneous_aggregate (TYPE_MODE (valtype), valtype, + &elt_mode, &n_elts)) + { + int first_reg, n_regs, i; + rtx par; + + if (SCALAR_FLOAT_MODE_P (elt_mode)) + { + /* _Decimal128 must use even/odd register pairs. */ + first_reg = (elt_mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN; + n_regs = (GET_MODE_SIZE (elt_mode) + 7) >> 3; + } + else + { + first_reg = ALTIVEC_ARG_RETURN; + n_regs = 1; + } + + par = gen_rtx_PARALLEL (TYPE_MODE (valtype), rtvec_alloc (n_elts)); + for (i = 0; i < n_elts; i++) + { + rtx r = gen_rtx_REG (elt_mode, first_reg + i * n_regs); + rtx off = GEN_INT (i * GET_MODE_SIZE (elt_mode)); + XVECEXP (par, 0, i) = gen_rtx_EXPR_LIST (VOIDmode, r, off); + } + + return par; + } + if (TARGET_32BIT && TARGET_POWERPC64 && TYPE_MODE (valtype) == DImode) { /* Long long return value need be split in -mpowerpc64, 32bit ABI. */ @@ -30637,7 +31354,7 @@ rs6000_legitimate_constant_p (enum machine_mode mode, rtx x) -/* Expand code to perform a call under the AIX ABI. */ +/* Expand code to perform a call under the AIX or ELFv2 ABI. */ void rs6000_call_aix (rtx value, rtx func_desc, rtx flag, rtx cookie) @@ -30657,12 +31374,12 @@ rs6000_call_aix (rtx value, rtx func_desc, rtx flag, rtx cookie) /* Handle indirect calls. */ if (GET_CODE (func_desc) != SYMBOL_REF - || !SYMBOL_REF_FUNCTION_P (func_desc)) + || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (func_desc))) { /* Save the TOC into its reserved slot before the call, and prepare to restore it after the call. */ rtx stack_ptr = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM); - rtx stack_toc_offset = GEN_INT (5 * GET_MODE_SIZE (Pmode)); + rtx stack_toc_offset = GEN_INT (RS6000_TOC_SAVE_SLOT); rtx stack_toc_mem = gen_frame_mem (Pmode, gen_rtx_PLUS (Pmode, stack_ptr, stack_toc_offset)); @@ -30678,38 +31395,49 @@ rs6000_call_aix (rtx value, rtx func_desc, rtx flag, rtx cookie) emit_move_insn (stack_toc_mem, toc_reg); } - /* A function pointer under AIX is a pointer to a data area whose - first word contains the actual address of the function, whose - second word contains a pointer to its TOC, and whose third word - contains a value to place in the static chain register (r11). - Note that if we load the static chain, our "trampoline" need - not have any executable code. */ - - /* Load up address of the actual function. */ - func_desc = force_reg (Pmode, func_desc); - func_addr = gen_reg_rtx (Pmode); - emit_move_insn (func_addr, gen_rtx_MEM (Pmode, func_desc)); - - /* Prepare to load the TOC of the called function. Note that the - TOC load must happen immediately before the actual call so - that unwinding the TOC registers works correctly. See the - comment in frob_update_context. */ - rtx func_toc_offset = GEN_INT (GET_MODE_SIZE (Pmode)); - rtx func_toc_mem = gen_rtx_MEM (Pmode, - gen_rtx_PLUS (Pmode, func_desc, - func_toc_offset)); - toc_load = gen_rtx_USE (VOIDmode, func_toc_mem); - - /* If we have a static chain, load it up. */ - if (TARGET_POINTERS_TO_NESTED_FUNCTIONS) - { - rtx sc_reg = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); - rtx func_sc_offset = GEN_INT (2 * GET_MODE_SIZE (Pmode)); - rtx func_sc_mem = gen_rtx_MEM (Pmode, - gen_rtx_PLUS (Pmode, func_desc, - func_sc_offset)); - emit_move_insn (sc_reg, func_sc_mem); - abi_reg = sc_reg; + if (DEFAULT_ABI == ABI_ELFv2) + { + /* A function pointer in the ELFv2 ABI is just a plain address, but + the ABI requires it to be loaded into r12 before the call. */ + func_addr = gen_rtx_REG (Pmode, 12); + emit_move_insn (func_addr, func_desc); + abi_reg = func_addr; + } + else + { + /* A function pointer under AIX is a pointer to a data area whose + first word contains the actual address of the function, whose + second word contains a pointer to its TOC, and whose third word + contains a value to place in the static chain register (r11). + Note that if we load the static chain, our "trampoline" need + not have any executable code. */ + + /* Load up address of the actual function. */ + func_desc = force_reg (Pmode, func_desc); + func_addr = gen_reg_rtx (Pmode); + emit_move_insn (func_addr, gen_rtx_MEM (Pmode, func_desc)); + + /* Prepare to load the TOC of the called function. Note that the + TOC load must happen immediately before the actual call so + that unwinding the TOC registers works correctly. See the + comment in frob_update_context. */ + rtx func_toc_offset = GEN_INT (GET_MODE_SIZE (Pmode)); + rtx func_toc_mem = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (Pmode, func_desc, + func_toc_offset)); + toc_load = gen_rtx_USE (VOIDmode, func_toc_mem); + + /* If we have a static chain, load it up. */ + if (TARGET_POINTERS_TO_NESTED_FUNCTIONS) + { + rtx sc_reg = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); + rtx func_sc_offset = GEN_INT (2 * GET_MODE_SIZE (Pmode)); + rtx func_sc_mem = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (Pmode, func_desc, + func_sc_offset)); + emit_move_insn (sc_reg, func_sc_mem); + abi_reg = sc_reg; + } } } else @@ -30743,7 +31471,7 @@ rs6000_call_aix (rtx value, rtx func_desc, rtx flag, rtx cookie) use_reg (&CALL_INSN_FUNCTION_USAGE (insn), abi_reg); } -/* Expand code to perform a sibling call under the AIX ABI. */ +/* Expand code to perform a sibling call under the AIX or ELFv2 ABI. */ void rs6000_sibcall_aix (rtx value, rtx func_desc, rtx flag, rtx cookie) diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 6dd0bcbf4c6..eb59235ec61 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1527,18 +1527,14 @@ extern enum reg_class rs6000_constraints[RS6000_CONSTRAINT_MAX]; #define FRAME_GROWS_DOWNWARD (flag_stack_protect != 0 \ || (flag_sanitize & SANITIZE_ADDRESS) != 0) -/* Size of the outgoing register save area */ -#define RS6000_REG_SAVE \ - ((DEFAULT_ABI == ABI_V4 ? 0 : 32) << (TARGET_64BIT ? 1 : 0)) - /* Size of the fixed area on the stack */ #define RS6000_SAVE_AREA \ - ((DEFAULT_ABI == ABI_V4 ? 8 : 24) << (TARGET_64BIT ? 1 : 0)) + ((DEFAULT_ABI == ABI_V4 ? 8 : DEFAULT_ABI == ABI_ELFv2 ? 16 : 24) \ + << (TARGET_64BIT ? 1 : 0)) -/* MEM representing address to save the TOC register */ -#define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \ - plus_constant (Pmode, stack_pointer_rtx, \ - (TARGET_32BIT ? 20 : 40))) +/* Stack offset for toc save slot. */ +#define RS6000_TOC_SAVE_SLOT \ + ((DEFAULT_ABI == ABI_ELFv2 ? 12 : 20) << (TARGET_64BIT ? 1 : 0)) /* Align an address */ #define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1)) @@ -1588,7 +1584,7 @@ extern enum reg_class rs6000_constraints[RS6000_CONSTRAINT_MAX]; /* Define this if stack space is still allocated for a parameter passed in a register. The value is the number of bytes allocated to this area. */ -#define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE +#define REG_PARM_STACK_SPACE(FNDECL) rs6000_reg_parm_stack_space((FNDECL)) /* Define this if the above stack space is to be considered part of the space allocated by the caller. */ @@ -1641,10 +1637,17 @@ extern enum reg_class rs6000_constraints[RS6000_CONSTRAINT_MAX]; #define ALTIVEC_ARG_MAX_REG (ALTIVEC_ARG_MIN_REG + 11) #define ALTIVEC_ARG_NUM_REG (ALTIVEC_ARG_MAX_REG - ALTIVEC_ARG_MIN_REG + 1) +/* Maximum number of registers per ELFv2 homogeneous aggregate argument. */ +#define AGGR_ARG_NUM_REG 8 + /* Return registers */ #define GP_ARG_RETURN GP_ARG_MIN_REG #define FP_ARG_RETURN FP_ARG_MIN_REG #define ALTIVEC_ARG_RETURN (FIRST_ALTIVEC_REGNO + 2) +#define FP_ARG_MAX_RETURN (DEFAULT_ABI != ABI_ELFv2 ? FP_ARG_RETURN \ + : (FP_ARG_RETURN + AGGR_ARG_NUM_REG - 1)) +#define ALTIVEC_ARG_MAX_RETURN (DEFAULT_ABI != ABI_ELFv2 ? ALTIVEC_ARG_RETURN \ + : (ALTIVEC_ARG_RETURN + AGGR_ARG_NUM_REG - 1)) /* Flags for the call/call_value rtl operations set up by function_arg */ #define CALL_NORMAL 0x00000000 /* no special processing */ @@ -1664,8 +1667,10 @@ extern enum reg_class rs6000_constraints[RS6000_CONSTRAINT_MAX]; On RS/6000, this is r3, fp1, and v2 (for AltiVec). */ #define FUNCTION_VALUE_REGNO_P(N) \ ((N) == GP_ARG_RETURN \ - || ((N) == FP_ARG_RETURN && TARGET_HARD_FLOAT && TARGET_FPRS) \ - || ((N) == ALTIVEC_ARG_RETURN && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)) + || ((N) >= FP_ARG_RETURN && (N) <= FP_ARG_MAX_RETURN \ + && TARGET_HARD_FLOAT && TARGET_FPRS) \ + || ((N) >= ALTIVEC_ARG_RETURN && (N) <= ALTIVEC_ARG_MAX_RETURN \ + && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)) /* 1 if N is a possible register number for function argument passing. On RS/6000, these are r3-r10 and fp1-fp13. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7a2fcfd5b2d..4de7c3a2f6e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -11185,7 +11185,7 @@ (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")] UNSPEC_TLSGD) (clobber (reg:SI LR_REGNO))] - "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX" + "HAVE_AS_TLS && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)" { if (TARGET_CMODEL != CMODEL_SMALL) return "addis %0,%1,%2@got@tlsgd@ha\;addi %0,%0,%2@got@tlsgd@l\;" @@ -11294,7 +11294,8 @@ (unspec:TLSmode [(match_operand:TLSmode 3 "rs6000_tls_symbol_ref" "")] UNSPEC_TLSGD) (clobber (reg:SI LR_REGNO))] - "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX && TARGET_TLS_MARKERS" + "HAVE_AS_TLS && TARGET_TLS_MARKERS + && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)" "bl %z1(%3@tlsgd)\;nop" [(set_attr "type" "branch") (set_attr "length" "8")]) @@ -11326,7 +11327,7 @@ (unspec:TLSmode [(match_operand:TLSmode 1 "gpc_reg_operand" "b")] UNSPEC_TLSLD) (clobber (reg:SI LR_REGNO))] - "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX" + "HAVE_AS_TLS && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)" { if (TARGET_CMODEL != CMODEL_SMALL) return "addis %0,%1,%&@got@tlsld@ha\;addi %0,%0,%&@got@tlsld@l\;" @@ -11429,7 +11430,8 @@ (match_operand 2 "" "g"))) (unspec:TLSmode [(const_int 0)] UNSPEC_TLSLD) (clobber (reg:SI LR_REGNO))] - "HAVE_AS_TLS && DEFAULT_ABI == ABI_AIX && TARGET_TLS_MARKERS" + "HAVE_AS_TLS && TARGET_TLS_MARKERS + && (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)" "bl %z1(%&@tlsld)\;nop" [(set_attr "type" "branch") (set_attr "length" "8")]) @@ -11800,7 +11802,7 @@ [(parallel [(set (match_operand:SI 0 "gpc_reg_operand" "=r") (unspec:SI [(const_int 0)] UNSPEC_TOC)) (use (reg:SI 2))])] - "DEFAULT_ABI == ABI_AIX && TARGET_32BIT" + "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_32BIT" "* { char buf[30]; @@ -11815,7 +11817,7 @@ [(parallel [(set (match_operand:DI 0 "gpc_reg_operand" "=r") (unspec:DI [(const_int 0)] UNSPEC_TOC)) (use (reg:DI 2))])] - "DEFAULT_ABI == ABI_AIX && TARGET_64BIT" + "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) && TARGET_64BIT" "* { char buf[30]; @@ -12081,7 +12083,7 @@ operands[0] = XEXP (operands[0], 0); - if (DEFAULT_ABI == ABI_AIX) + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) { rs6000_call_aix (NULL_RTX, operands[0], operands[1], operands[2]); DONE; @@ -12125,7 +12127,7 @@ operands[1] = XEXP (operands[1], 0); - if (DEFAULT_ABI == ABI_AIX) + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) { rs6000_call_aix (operands[0], operands[1], operands[2], operands[3]); DONE; @@ -12424,7 +12426,7 @@ [(call (mem:SI (match_operand:P 0 "current_file_function_operand" "s")) (match_operand 1 "" "g")) (clobber (reg:P LR_REGNO))] - "DEFAULT_ABI == ABI_AIX" + "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2" "bl %z0" [(set_attr "type" "branch") (set_attr "length" "4")]) @@ -12434,7 +12436,7 @@ (call (mem:SI (match_operand:P 1 "current_file_function_operand" "s")) (match_operand 2 "" "g"))) (clobber (reg:P LR_REGNO))] - "DEFAULT_ABI == ABI_AIX" + "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2" "bl %z1" [(set_attr "type" "branch") (set_attr "length" "4")]) @@ -12446,7 +12448,7 @@ [(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s")) (match_operand 1 "" "g")) (clobber (reg:P LR_REGNO))] - "DEFAULT_ABI == ABI_AIX" + "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2" "bl %z0\;nop" [(set_attr "type" "branch") (set_attr "length" "8")]) @@ -12456,7 +12458,7 @@ (call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s")) (match_operand 2 "" "g"))) (clobber (reg:P LR_REGNO))] - "DEFAULT_ABI == ABI_AIX" + "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2" "bl %z1\;nop" [(set_attr "type" "branch") (set_attr "length" "8")]) @@ -12489,6 +12491,31 @@ [(set_attr "type" "jmpreg") (set_attr "length" "12")]) +;; Call to indirect functions with the ELFv2 ABI. +;; Operand0 is the addresss of the function to call +;; Operand2 is the stack location to hold the current TOC pointer + +(define_insn "*call_indirect_elfv2<mode>" + [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l")) + (match_operand 1 "" "g,g")) + (set (reg:P TOC_REGNUM) (match_operand:P 2 "memory_operand" "<ptrm>,<ptrm>")) + (clobber (reg:P LR_REGNO))] + "DEFAULT_ABI == ABI_ELFv2" + "b%T0l\;<ptrload> 2,%2" + [(set_attr "type" "jmpreg") + (set_attr "length" "8")]) + +(define_insn "*call_value_indirect_elfv2<mode>" + [(set (match_operand 0 "" "") + (call (mem:SI (match_operand:P 1 "register_operand" "c,*l")) + (match_operand 2 "" "g,g"))) + (set (reg:P TOC_REGNUM) (match_operand:P 3 "memory_operand" "<ptrm>,<ptrm>")) + (clobber (reg:P LR_REGNO))] + "DEFAULT_ABI == ABI_ELFv2" + "b%T1l\;<ptrload> 2,%3" + [(set_attr "type" "jmpreg") + (set_attr "length" "8")]) + ;; Call subroutine returning any type. (define_expand "untyped_call" @@ -12538,7 +12565,7 @@ operands[0] = XEXP (operands[0], 0); - if (DEFAULT_ABI == ABI_AIX) + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) { rs6000_sibcall_aix (NULL_RTX, operands[0], operands[1], operands[2]); DONE; @@ -12565,7 +12592,7 @@ operands[1] = XEXP (operands[1], 0); - if (DEFAULT_ABI == ABI_AIX) + if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) { rs6000_sibcall_aix (operands[0], operands[1], operands[2], operands[3]); DONE; @@ -12725,7 +12752,7 @@ [(call (mem:SI (match_operand:P 0 "call_operand" "s,c")) (match_operand 1 "" "g,g")) (simple_return)] - "DEFAULT_ABI == ABI_AIX" + "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2" "@ b %z0 b%T0" @@ -12737,7 +12764,7 @@ (call (mem:SI (match_operand:P 1 "call_operand" "s,c")) (match_operand 2 "" "g,g"))) (simple_return)] - "DEFAULT_ABI == ABI_AIX" + "DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2" "@ b %z1 b%T1" diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 94e4b3883dc..347f76e207c 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -369,6 +369,14 @@ mabi=no-spe Target RejectNegative Var(rs6000_spe_abi, 0) Do not use the SPE ABI extensions +mabi=elfv1 +Target RejectNegative Var(rs6000_elf_abi, 1) Save +Use the ELFv1 ABI + +mabi=elfv2 +Target RejectNegative Var(rs6000_elf_abi, 2) +Use the ELFv2 ABI + ; These are here for testing during development only, do not document ; in the manual please. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index be9a3a56b99..dd787dda559 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,28 @@ 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + * gcc.target/powerpc/ppc64-abi-1.c (stack_frame_t): Remove + compiler and linker field if _CALL_ELF == 2. + * gcc.target/powerpc/ppc64-abi-2.c (stack_frame_t): Likewise. + * gcc.target/powerpc/ppc64-abi-dfp-1.c (stack_frame_t): Likewise. + * gcc.dg/stack-usage-1.c (SIZE): Update value for _CALL_ELF == 2. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * gcc.target/powerpc/ppc64-abi-dfp-1.c (FUNC_START): New macro. + (WRAPPER): Use it. + * gcc.target/powerpc/no-r11-1.c: Skip on powerpc_elfv2. + * gcc.target/powerpc/no-r11-2.c: Skip on powerpc_elfv2. + * gcc.target/powerpc/no-r11-3.c: Skip on powerpc_elfv2. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * lib/target-supports.exp (check_effective_target_powerpc_elfv2): + New function. + * gcc.target/powerpc/pr57949-1.c: Disable for powerpc_elfv2. + * gcc.target/powerpc/pr57949-2.c: Likewise. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + * g++.dg/eh/ppc64-sighandle-cr.C: New test. 2013-11-14 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c index ff9709ad4a2..78807bacd30 100644 --- a/gcc/testsuite/gcc.dg/stack-usage-1.c +++ b/gcc/testsuite/gcc.dg/stack-usage-1.c @@ -40,7 +40,11 @@ # endif #elif defined (__powerpc64__) || defined (__ppc64__) || defined (__POWERPC64__) \ || defined (__PPC64__) -# define SIZE 180 +# if _CALL_ELF == 2 +# define SIZE 208 +# else +# define SIZE 180 +# endif #elif defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) \ || defined (__POWERPC__) || defined (PPC) || defined (_IBMR2) # if defined (__ALTIVEC__) diff --git a/gcc/testsuite/gcc.target/powerpc/no-r11-1.c b/gcc/testsuite/gcc.target/powerpc/no-r11-1.c index 57c01a3e259..94b7988ec76 100644 --- a/gcc/testsuite/gcc.target/powerpc/no-r11-1.c +++ b/gcc/testsuite/gcc.target/powerpc/no-r11-1.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ /* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ /* { dg-options "-O2 -mno-pointers-to-nested-functions" } */ int diff --git a/gcc/testsuite/gcc.target/powerpc/no-r11-2.c b/gcc/testsuite/gcc.target/powerpc/no-r11-2.c index 3e4a6ca0ff4..214a9dfb49a 100644 --- a/gcc/testsuite/gcc.target/powerpc/no-r11-2.c +++ b/gcc/testsuite/gcc.target/powerpc/no-r11-2.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ /* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ /* { dg-options "-O2 -mpointers-to-nested-functions" } */ int diff --git a/gcc/testsuite/gcc.target/powerpc/no-r11-3.c b/gcc/testsuite/gcc.target/powerpc/no-r11-3.c index c98797e7f69..9cc83090921 100644 --- a/gcc/testsuite/gcc.target/powerpc/no-r11-3.c +++ b/gcc/testsuite/gcc.target/powerpc/no-r11-3.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ /* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ /* { dg-options "-O2 -mno-pointers-to-nested-functions" } */ extern void ext_call (int (func) (void)); diff --git a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c index 8fcb7fd7fae..9dc730e0dbd 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c @@ -89,8 +89,10 @@ typedef struct sf long a1; long a2; long a3; +#if _CALL_ELF != 2 long a4; long a5; +#endif parm_t slot[100]; } stack_frame_t; diff --git a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c index a9883d9e335..fdb781554c6 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c @@ -107,8 +107,10 @@ typedef struct sf long a1; long a2; long a3; +#if _CALL_ELF != 2 long a4; long a5; +#endif parm_t slot[100]; } stack_frame_t; diff --git a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c index eb54a653bf7..4e91b1bba26 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c @@ -33,15 +33,27 @@ reg_parms_t gparms; /* Wrapper to save the GPRs and FPRs and then jump to the real function. */ +#if _CALL_ELF != 2 +#define FUNC_START(NAME) \ + "\t.globl\t" NAME "\n\t" \ + ".section \".opd\",\"aw\"\n\t" \ + ".align 3\n" \ + NAME ":\n\t" \ + ".quad .L." NAME ",.TOC.@tocbase,0\n\t" \ + ".text\n\t" \ + ".type " NAME ", @function\n" \ + ".L." NAME ":\n\t" +#else +#define FUNC_START(NAME) \ + "\t.globl\t" NAME "\n\t" \ + ".text\n\t" \ + NAME ":\n" \ + "0:\taddis 2,12,(.TOC.-0b)@ha\n\t" \ + "addi 2,2,(.TOC.-0b)@l\n\t" \ + ".localentry " NAME ",.-" NAME "\n\t" +#endif #define WRAPPER(NAME) \ -__asm__ ("\t.globl\t" #NAME "_asm\n\t" \ - ".section \".opd\",\"aw\"\n\t" \ - ".align 3\n" \ - #NAME "_asm:\n\t" \ - ".quad .L." #NAME "_asm,.TOC.@tocbase,0\n\t" \ - ".text\n\t" \ - ".type " #NAME "_asm, @function\n" \ - ".L." #NAME "_asm:\n\t" \ +__asm__ (FUNC_START (#NAME "_asm") \ "ld 11,gparms@got(2)\n\t" \ "std 3,0(11)\n\t" \ "std 4,8(11)\n\t" \ @@ -75,8 +87,10 @@ typedef struct sf long a1; long a2; long a3; +#if _CALL_ELF != 2 long a4; long a5; +#endif unsigned long slot[100]; } stack_frame_t; diff --git a/gcc/testsuite/gcc.target/powerpc/pr57949-1.c b/gcc/testsuite/gcc.target/powerpc/pr57949-1.c index 253b2d89083..c2eecea1b84 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr57949-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr57949-1.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ /* { dg-options "-O2 -mcpu=power7" } */ /* Verify that vs is 16-byte aligned in the absence of -mcompat-align-parm. */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr57949-2.c b/gcc/testsuite/gcc.target/powerpc/pr57949-2.c index aa6a0d9631a..e5ad212f3e3 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr57949-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr57949-2.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ /* { dg-options "-O2 -mcpu=power7 -mcompat-align-parm" } */ /* Verify that vs is not 16-byte aligned with -mcompat-align-parm. */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index dbff4028d01..104818d327e 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -3020,6 +3020,22 @@ proc check_effective_target_powerpc_405_nocache { } { } } +# Return 1 if this is a PowerPC target using the ELFv2 ABI. + +proc check_effective_target_powerpc_elfv2 { } { + if { [istarget powerpc*-*-*] } { + return [check_no_compiler_messages powerpc_elfv2 object { + #if _CALL_ELF != 2 + #error not ELF v2 ABI + #else + int dummy; + #endif + }] + } else { + return 0 + } +} + # Return 1 if this is a SPU target with a toolchain that # supports automatic overlay generation. |