summaryrefslogtreecommitdiff
path: root/gcc/testsuite/gcc.target
diff options
context:
space:
mode:
Diffstat (limited to 'gcc/testsuite/gcc.target')
-rw-r--r--gcc/testsuite/gcc.target/arm/stack-red-zone.c12
-rw-r--r--gcc/testsuite/gcc.target/arm/wmul-1.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/wmul-2.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/wmul-3.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/wmul-4.c2
-rw-r--r--gcc/testsuite/gcc.target/epiphany/epiphany.exp41
-rw-r--r--gcc/testsuite/gcc.target/epiphany/fmadd-1.c17
-rw-r--r--gcc/testsuite/gcc.target/epiphany/fmsub-1.c17
-rw-r--r--gcc/testsuite/gcc.target/epiphany/interrupt.c14
-rw-r--r--gcc/testsuite/gcc.target/i386/47698.c10
-rw-r--r--gcc/testsuite/gcc.target/i386/avx-cvt-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/avx2-cvt-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/avx2-gather-1.c215
-rw-r--r--gcc/testsuite/gcc.target/i386/avx2-gather-2.c7
-rw-r--r--gcc/testsuite/gcc.target/i386/avx2-gather-3.c167
-rw-r--r--gcc/testsuite/gcc.target/i386/avx2-gather-4.c38
-rw-r--r--gcc/testsuite/gcc.target/i386/pr49781-1.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/sse2-cvt-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/vectorize4-avx.c2
-rw-r--r--gcc/testsuite/gcc.target/sparc/20111102-1.c17
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-1-vis1.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-1-vis2.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-1-vis3.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-1.inc85
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-2-vis1.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-2-vis2.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-2-vis3.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-2.inc94
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-3-vis1.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-3-vis2.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c5
-rw-r--r--gcc/testsuite/gcc.target/sparc/vec-init-3.inc105
32 files changed, 893 insertions, 9 deletions
diff --git a/gcc/testsuite/gcc.target/arm/stack-red-zone.c b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
new file mode 100644
index 00000000000..b9f0f99371e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
@@ -0,0 +1,12 @@
+/* No stack red zone. PR38644. */
+/* { dg-options "-mthumb -O2" } */
+/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" } } */
+
+extern int doStreamReadBlock (int *, char *, int size, int);
+
+char readStream (int *s)
+{
+ char c = 0;
+ doStreamReadBlock (s, &c, 1, *s);
+ return c;
+}
diff --git a/gcc/testsuite/gcc.target/arm/wmul-1.c b/gcc/testsuite/gcc.target/arm/wmul-1.c
index 426c9393f20..ddddd509fe6 100644
--- a/gcc/testsuite/gcc.target/arm/wmul-1.c
+++ b/gcc/testsuite/gcc.target/arm/wmul-1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_dsp } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O1 -fexpensive-optimizations" } */
int mac(const short *a, const short *b, int sqr, int *sum)
{
diff --git a/gcc/testsuite/gcc.target/arm/wmul-2.c b/gcc/testsuite/gcc.target/arm/wmul-2.c
index 898b5f065cb..2ea55f9fbe1 100644
--- a/gcc/testsuite/gcc.target/arm/wmul-2.c
+++ b/gcc/testsuite/gcc.target/arm/wmul-2.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_dsp } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O1 -fexpensive-optimizations" } */
void vec_mpy(int y[], const short x[], short scaler)
{
diff --git a/gcc/testsuite/gcc.target/arm/wmul-3.c b/gcc/testsuite/gcc.target/arm/wmul-3.c
index 83f73fba727..144b553082e 100644
--- a/gcc/testsuite/gcc.target/arm/wmul-3.c
+++ b/gcc/testsuite/gcc.target/arm/wmul-3.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_dsp } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O1 -fexpensive-optimizations" } */
int mac(const short *a, const short *b, int sqr, int *sum)
{
diff --git a/gcc/testsuite/gcc.target/arm/wmul-4.c b/gcc/testsuite/gcc.target/arm/wmul-4.c
index a297bda2182..68f9866746d 100644
--- a/gcc/testsuite/gcc.target/arm/wmul-4.c
+++ b/gcc/testsuite/gcc.target/arm/wmul-4.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_dsp } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O1 -fexpensive-optimizations" } */
int mac(const int *a, const int *b, long long sqr, long long *sum)
{
diff --git a/gcc/testsuite/gcc.target/epiphany/epiphany.exp b/gcc/testsuite/gcc.target/epiphany/epiphany.exp
new file mode 100644
index 00000000000..dc9fecc728e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/epiphany/epiphany.exp
@@ -0,0 +1,41 @@
+# Copyright (C) 2007, 2011 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an epiphany target.
+if ![istarget epiphany*-*-*] then {
+ return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+ set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
+ "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/epiphany/fmadd-1.c b/gcc/testsuite/gcc.target/epiphany/fmadd-1.c
new file mode 100644
index 00000000000..868d5bd0226
--- /dev/null
+++ b/gcc/testsuite/gcc.target/epiphany/fmadd-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "fmadd\[ \ta-zA-Z0-9\]*," 2 } } */
+
+#include <epiphany_intrinsics.h>
+
+float
+f1 (float a, float b, float c)
+{
+ return __builtin_epiphany_fmadd (a, b, c);
+}
+
+float
+f2 (float a, float b, float c)
+{
+ return a + b * c;
+}
diff --git a/gcc/testsuite/gcc.target/epiphany/fmsub-1.c b/gcc/testsuite/gcc.target/epiphany/fmsub-1.c
new file mode 100644
index 00000000000..ff7fefa7f20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/epiphany/fmsub-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "fmsub\[ \ta-zA-Z0-9\]*," 2 } } */
+
+#include <epiphany_intrinsics.h>
+
+float
+f1 (float a, float b, float c)
+{
+ return __builtin_epiphany_fmsub (a, b, c);
+}
+
+float
+f2 (float a, float b, float c)
+{
+ return a - b * c;
+}
diff --git a/gcc/testsuite/gcc.target/epiphany/interrupt.c b/gcc/testsuite/gcc.target/epiphany/interrupt.c
new file mode 100644
index 00000000000..a44c79e432e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/epiphany/interrupt.c
@@ -0,0 +1,14 @@
+void __attribute__((interrupt("dma0")))
+f (void)
+{
+}
+
+void __attribute__((interrupt("Vss")))
+g (void)
+{ /* { dg-warning "is not \"reset\"" } */
+}
+
+void __attribute__((interrupt(42)))
+h (void)
+{ /* { dg-warning "is not a string constant" } */
+}
diff --git a/gcc/testsuite/gcc.target/i386/47698.c b/gcc/testsuite/gcc.target/i386/47698.c
new file mode 100644
index 00000000000..2c751093ae3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/47698.c
@@ -0,0 +1,10 @@
+/* { dg-options "-Os" } */
+/* { dg-final { scan-assembler-not "cmov" } } */
+
+extern volatile unsigned long mmio;
+unsigned long foo(int cond)
+{
+ if (cond)
+ return mmio;
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx-cvt-2.c b/gcc/testsuite/gcc.target/i386/avx-cvt-2.c
index 78c6398f341..68206f5a0e7 100644
--- a/gcc/testsuite/gcc.target/i386/avx-cvt-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx-cvt-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O3 -mavx -mno-avx2 -fdump-tree-vect-details" } */
+/* { dg-options "-O3 -mavx -mno-avx2 -mtune=generic -fdump-tree-vect-details" } */
#include "avx-cvt-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx2-cvt-2.c b/gcc/testsuite/gcc.target/i386/avx2-cvt-2.c
index 288e5601a46..4826e9b6d05 100644
--- a/gcc/testsuite/gcc.target/i386/avx2-cvt-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx2-cvt-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O3 -mavx2 -fdump-tree-vect-details" } */
+/* { dg-options "-O3 -mavx2 -mtune=generic -fdump-tree-vect-details" } */
#include "avx2-cvt-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx2-gather-1.c b/gcc/testsuite/gcc.target/i386/avx2-gather-1.c
new file mode 100644
index 00000000000..7ed567dc491
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx2-gather-1.c
@@ -0,0 +1,215 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx2 } */
+/* { dg-options "-O3 -mavx2" } */
+
+#include "avx2-check.h"
+
+#define N 1024
+float vf1[N+16], vf2[N];
+double vd1[N+16], vd2[N];
+int k[N];
+long l[N];
+short n[N];
+
+__attribute__((noinline, noclone)) void
+f1 (void)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ vf2[i] = vf1[k[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f2 (void)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ n[i] = (int) vf1[k[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f3 (int x)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ vf2[i] = vf1[k[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f4 (int x)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ n[i] = (int) vf1[k[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f5 (void)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ vd2[i] = vd1[k[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f6 (void)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ n[i] = (int) vd1[k[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f7 (int x)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ vd2[i] = vd1[k[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f8 (int x)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ n[i] = (int) vd1[k[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f9 (void)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ vf2[i] = vf1[l[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f10 (void)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ n[i] = (int) vf1[l[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f11 (long x)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ vf2[i] = vf1[l[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f12 (long x)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ n[i] = (int) vf1[l[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f13 (void)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ vd2[i] = vd1[l[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f14 (void)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ n[i] = (int) vd1[l[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f15 (long x)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ vd2[i] = vd1[l[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f16 (long x)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ n[i] = (int) vd1[l[i] + x];
+}
+
+static void
+avx2_test (void)
+{
+ int i;
+
+ for (i = 0; i < N + 16; i++)
+ {
+ asm ("");
+ vf1[i] = 17.0f + i;
+ vd1[i] = 19.0 + i;
+ }
+ for (i = 0; i < N; i++)
+ {
+ asm ("");
+ k[i] = (i * 731) & (N - 1);
+ l[i] = (i * 657) & (N - 1);
+ }
+
+ f1 ();
+ f2 ();
+ for (i = 0; i < N; i++)
+ if (vf2[i] != ((i * 731) & (N - 1)) + 17
+ || n[i] != ((i * 731) & (N - 1)) + 17)
+ abort ();
+
+ f3 (12);
+ f4 (14);
+ for (i = 0; i < N; i++)
+ if (vf2[i] != ((i * 731) & (N - 1)) + 17 + 12
+ || n[i] != ((i * 731) & (N - 1)) + 17 + 14)
+ abort ();
+
+ f5 ();
+ f6 ();
+ for (i = 0; i < N; i++)
+ if (vd2[i] != ((i * 731) & (N - 1)) + 19
+ || n[i] != ((i * 731) & (N - 1)) + 19)
+ abort ();
+
+ f7 (7);
+ f8 (9);
+ for (i = 0; i < N; i++)
+ if (vd2[i] != ((i * 731) & (N - 1)) + 19 + 7
+ || n[i] != ((i * 731) & (N - 1)) + 19 + 9)
+ abort ();
+
+ f9 ();
+ f10 ();
+ for (i = 0; i < N; i++)
+ if (vf2[i] != ((i * 657) & (N - 1)) + 17
+ || n[i] != ((i * 657) & (N - 1)) + 17)
+ abort ();
+
+ f11 (2);
+ f12 (4);
+ for (i = 0; i < N; i++)
+ if (vf2[i] != ((i * 657) & (N - 1)) + 17 + 2
+ || n[i] != ((i * 657) & (N - 1)) + 17 + 4)
+ abort ();
+
+ f13 ();
+ f14 ();
+ for (i = 0; i < N; i++)
+ if (vd2[i] != ((i * 657) & (N - 1)) + 19
+ || n[i] != ((i * 657) & (N - 1)) + 19)
+ abort ();
+
+ f15 (13);
+ f16 (15);
+ for (i = 0; i < N; i++)
+ if (vd2[i] != ((i * 657) & (N - 1)) + 19 + 13
+ || n[i] != ((i * 657) & (N - 1)) + 19 + 15)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx2-gather-2.c b/gcc/testsuite/gcc.target/i386/avx2-gather-2.c
new file mode 100644
index 00000000000..8a7fe95a238
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx2-gather-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx2 -fdump-tree-vect-details" } */
+
+#include "avx2-gather-1.c"
+
+/* { dg-final { scan-tree-dump-times "note: vectorized 1 loops in function" 16 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx2-gather-3.c b/gcc/testsuite/gcc.target/i386/avx2-gather-3.c
new file mode 100644
index 00000000000..fb6289c0e7e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx2-gather-3.c
@@ -0,0 +1,167 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx2 } */
+/* { dg-options "-O3 -mavx2 -ffast-math" } */
+
+#include "avx2-check.h"
+
+#define N 1024
+float f[N];
+double d[N];
+int k[N];
+float *l[N];
+double *n[N];
+int **m[N];
+long **o[N];
+long q[N];
+long *r[N];
+int *s[N];
+
+__attribute__((noinline, noclone)) float
+f1 (void)
+{
+ int i;
+ float g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += f[k[i]];
+ return g;
+}
+
+__attribute__((noinline, noclone)) float
+f2 (float *p)
+{
+ int i;
+ float g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += p[k[i]];
+ return g;
+}
+
+__attribute__((noinline, noclone)) float
+f3 (void)
+{
+ int i;
+ float g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += *l[i];
+ return g;
+}
+
+__attribute__((noinline, noclone)) int
+f4 (void)
+{
+ int i;
+ int g = 0;
+ for (i = 0; i < N / 2; i++)
+ g += **m[i];
+ return g;
+}
+
+__attribute__((noinline, noclone)) double
+f5 (void)
+{
+ int i;
+ double g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += d[k[i]];
+ return g;
+}
+
+__attribute__((noinline, noclone)) double
+f6 (double *p)
+{
+ int i;
+ double g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += p[k[i]];
+ return g;
+}
+
+__attribute__((noinline, noclone)) double
+f7 (void)
+{
+ int i;
+ double g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += *n[i];
+ return g;
+}
+
+__attribute__((noinline, noclone)) int
+f8 (void)
+{
+ int i;
+ int g = 0;
+ for (i = 0; i < N / 2; i++)
+ g += **o[i];
+ return g;
+}
+
+__attribute__((noinline, noclone)) float
+f9 (void)
+{
+ int i;
+ float g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += f[q[i]];
+ return g;
+}
+
+__attribute__((noinline, noclone)) float
+f10 (float *p)
+{
+ int i;
+ float g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += p[q[i]];
+ return g;
+}
+
+__attribute__((noinline, noclone)) double
+f11 (void)
+{
+ int i;
+ double g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += d[q[i]];
+ return g;
+}
+
+__attribute__((noinline, noclone)) double
+f12 (double *p)
+{
+ int i;
+ double g = 0.0;
+ for (i = 0; i < N / 2; i++)
+ g += p[q[i]];
+ return g;
+}
+
+static void
+avx2_test (void)
+{
+ int i;
+
+ for (i = 0; i < N; i++)
+ {
+ asm ("");
+ f[i] = -256.0f + i;
+ d[i] = -258.0 + i;
+ k[i] = (i * 731) & (N - 1);
+ q[i] = (i * 657) & (N - 1);
+ l[i] = &f[(i * 239) & (N - 1)];
+ n[i] = &d[(i * 271) & (N - 1)];
+ r[i] = &q[(i * 323) & (N - 1)];
+ s[i] = &k[(i * 565) & (N - 1)];
+ m[i] = &s[(i * 13) & (N - 1)];
+ o[i] = &r[(i * 19) & (N - 1)];
+ }
+
+ if (f1 () != 136448.0f || f2 (f) != 136448.0f || f3 () != 130304.0)
+ abort ();
+ if (f4 () != 261376 || f5 () != 135424.0 || f6 (d) != 135424.0)
+ abort ();
+ if (f7 () != 129280.0 || f8 () != 259840L || f9 () != 130816.0f)
+ abort ();
+ if (f10 (f) != 130816.0f || f11 () != 129792.0 || f12 (d) != 129792.0)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx2-gather-4.c b/gcc/testsuite/gcc.target/i386/avx2-gather-4.c
new file mode 100644
index 00000000000..440a9c9b164
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx2-gather-4.c
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx2 } */
+/* { dg-options "-O3 -mavx2" } */
+
+#include "avx2-check.h"
+
+#define N 1024
+int a[N], b[N], c[N], d[N];
+
+__attribute__((noinline, noclone)) void
+foo (float *__restrict p, float *__restrict q, float *__restrict r,
+ long s1, long s2, long s3)
+{
+ int i;
+ for (i = 0; i < N; i++)
+ p[i] = q[a[i] * s1 + b[i] * s2 + s3] * r[c[i] * s1 + d[i] * s2 + s3];
+}
+
+static void
+avx2_test (void)
+{
+ int i;
+ float e[N], f[N], g[N];
+ for (i = 0; i < N; i++)
+ {
+ a[i] = (i * 7) & (N / 8 - 1);
+ b[i] = (i * 13) & (N / 8 - 1);
+ c[i] = (i * 23) & (N / 8 - 1);
+ d[i] = (i * 5) & (N / 8 - 1);
+ e[i] = 16.5 + i;
+ f[i] = 127.5 - i;
+ }
+ foo (g, e, f, 3, 2, 4);
+ for (i = 0; i < N; i++)
+ if (g[i] != (float) ((20.5 + a[i] * 3 + b[i] * 2)
+ * (123.5 - c[i] * 3 - d[i] * 2)))
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr49781-1.c b/gcc/testsuite/gcc.target/i386/pr49781-1.c
index 80db03416e5..60f9d50d866 100644
--- a/gcc/testsuite/gcc.target/i386/pr49781-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr49781-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fpic" } */
+/* { dg-options "-O2 -fpic -mtune=generic" } */
/* { dg-require-effective-target fpic } */
static int heap[2*(256 +1+29)+1];
diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvt-2.c b/gcc/testsuite/gcc.target/i386/sse2-cvt-2.c
index 9c4519544ca..00f13254c22 100644
--- a/gcc/testsuite/gcc.target/i386/sse2-cvt-2.c
+++ b/gcc/testsuite/gcc.target/i386/sse2-cvt-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O3 -msse2 -mno-sse3 -fdump-tree-vect-details" } */
+/* { dg-options "-O3 -msse2 -mno-sse3 -mtune=generic -fdump-tree-vect-details" } */
#include "sse2-cvt-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/vectorize4-avx.c b/gcc/testsuite/gcc.target/i386/vectorize4-avx.c
index 8e4a747a64b..33e99189373 100644
--- a/gcc/testsuite/gcc.target/i386/vectorize4-avx.c
+++ b/gcc/testsuite/gcc.target/i386/vectorize4-avx.c
@@ -11,4 +11,4 @@ calc_freq (int *dest)
dest[i] = sqrt (tmp_out[i]);
}
-/* { dg-final { scan-assembler "vsqrtpd\[ \\t\]+\[^\n\]*%ymm" { xfail *-*-* } } } */
+/* { dg-final { scan-assembler "vsqrtpd\[ \\t\]+\[^\n\]*%ymm" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/20111102-1.c b/gcc/testsuite/gcc.target/sparc/20111102-1.c
new file mode 100644
index 00000000000..d33f103e377
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/20111102-1.c
@@ -0,0 +1,17 @@
+/* PR target/50945 */
+/* { dg-do compile } */
+/* { dg-options "-O -msoft-float" } */
+
+double
+__powidf2 (double x, int m)
+{
+ unsigned int n = m < 0 ? -m : m;
+ double y = n % 2 ? x : 1;
+ while (n >>= 1)
+ {
+ x = x * x;
+ if (n % 2)
+ y = y * x;
+ }
+ return m < 0 ? 1/y : y;
+}
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-1-vis1.c b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis1.c
new file mode 100644
index 00000000000..4202bfa6e72
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis1.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_hw } */
+/* { dg-options "-mcpu=ultrasparc -mvis -O2" } */
+
+#include "vec-init-1.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-1-vis2.c b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis2.c
new file mode 100644
index 00000000000..a5c21323936
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis2.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis2_hw } */
+/* { dg-options "-mcpu=ultrasparc3 -O2" } */
+
+#include "vec-init-1.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-1-vis3.c b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis3.c
new file mode 100644
index 00000000000..ab916e052cc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis3.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis3_hw } */
+/* { dg-options "-mcpu=niagara3 -O2" } */
+
+#include "vec-init-1.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-1.inc b/gcc/testsuite/gcc.target/sparc/vec-init-1.inc
new file mode 100644
index 00000000000..e27bb6e293b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-1.inc
@@ -0,0 +1,85 @@
+typedef int __v1si __attribute__ ((__vector_size__ (4)));
+typedef int __v2si __attribute__ ((__vector_size__ (8)));
+typedef short __v2hi __attribute__ ((__vector_size__ (4)));
+typedef short __v4hi __attribute__ ((__vector_size__ (8)));
+typedef unsigned char __v4qi __attribute__ ((__vector_size__ (4)));
+typedef unsigned char __v8qi __attribute__ ((__vector_size__ (8)));
+
+extern void abort (void);
+
+static void
+compare64 (void *p, unsigned long long val)
+{
+ if (*(unsigned long long *)p != val)
+ abort();
+}
+
+static void
+compare32 (void *p, unsigned int val)
+{
+ if (*(unsigned int *)p != val)
+ abort();
+}
+
+static void
+test_v8qi (unsigned char x)
+{
+ __v8qi v = { x, x, x, x, x, x, x, x };
+
+ compare64(&v, 0x4444444444444444ULL);
+}
+
+static void
+test_v4qi (unsigned char x)
+{
+ __v4qi v = { x, x, x, x };
+
+ compare32(&v, 0x44444444);
+}
+
+static void
+test_v4hi (unsigned short x)
+{
+ __v4hi v = { x, x, x, x, };
+
+ compare64(&v, 0x3344334433443344ULL);
+}
+
+static void
+test_v2hi (unsigned short x)
+{
+ __v2hi v = { x, x, };
+
+ compare32(&v, 0x33443344);
+}
+
+static void
+test_v2si (unsigned int x)
+{
+ __v2si v = { x, x, };
+
+ compare64(&v, 0x1122334411223344ULL);
+}
+
+static void
+test_v1si (unsigned int x)
+{
+ __v1si v = { x };
+
+ compare32(&v, 0x11223344);
+}
+
+unsigned char x8 = 0x44;
+unsigned short x16 = 0x3344;
+unsigned int x32 = 0x11223344;
+
+int main(void)
+{
+ test_v8qi (x8);
+ test_v4qi (x8);
+ test_v4hi (x16);
+ test_v2hi (x16);
+ test_v2si (x32);
+ test_v1si (x32);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-2-vis1.c b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis1.c
new file mode 100644
index 00000000000..efa08fa248c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis1.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_hw } */
+/* { dg-options "-mcpu=ultrasparc -mvis -O2" } */
+
+#include "vec-init-2.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-2-vis2.c b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis2.c
new file mode 100644
index 00000000000..3aa0f51595f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis2.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis2_hw } */
+/* { dg-options "-mcpu=ultrasparc3 -O2" } */
+
+#include "vec-init-2.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-2-vis3.c b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis3.c
new file mode 100644
index 00000000000..5f0c65860bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis3.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis3_hw } */
+/* { dg-options "-mcpu=niagara3 -O2" } */
+
+#include "vec-init-2.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-2.inc b/gcc/testsuite/gcc.target/sparc/vec-init-2.inc
new file mode 100644
index 00000000000..13685a1006e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-2.inc
@@ -0,0 +1,94 @@
+typedef short __v2hi __attribute__ ((__vector_size__ (4)));
+typedef short __v4hi __attribute__ ((__vector_size__ (8)));
+
+extern void abort (void);
+
+static void
+compare64 (int n, void *p, unsigned long long val)
+{
+ unsigned long long *x = (unsigned long long *) p;
+
+ if (*x != val)
+ abort();
+}
+
+static void
+compare32 (int n, void *p, unsigned int val)
+{
+ unsigned int *x = (unsigned int *) p;
+ if (*x != val)
+ abort();
+}
+
+#define V2HI_TEST(N, elt0, elt1) \
+static void \
+test_v2hi_##N (unsigned short x, unsigned short y) \
+{ \
+ __v2hi v = { (elt0), (elt1) }; \
+ compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
+}
+
+V2HI_TEST(1, x, y)
+V2HI_TEST(2, y, x)
+V2HI_TEST(3, x, x)
+V2HI_TEST(4, x, 0)
+V2HI_TEST(5, 0, x)
+V2HI_TEST(6, y, 1)
+V2HI_TEST(7, 1, y)
+V2HI_TEST(8, 2, 3)
+V2HI_TEST(9, 0x400, x)
+V2HI_TEST(10, y, 0x8000)
+
+#define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
+static void \
+test_v4hi_##N (unsigned short a, unsigned short b, unsigned short c, unsigned short d) \
+{ \
+ __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
+ compare64(N, &v, \
+ ((long long)(elt0) << 48) | \
+ ((long long)(elt1) << 32) | \
+ ((long long)(elt2) << 16) | \
+ ((long long)(elt3))); \
+}
+
+V4HI_TEST(1, a, a, a, a)
+V4HI_TEST(2, a, b, c, d)
+V4HI_TEST(3, a, a, b, b)
+V4HI_TEST(4, d, c, b, a)
+V4HI_TEST(5, a, 0, 0, 0)
+V4HI_TEST(6, a, 0, b, 0)
+V4HI_TEST(7, c, 5, 5, 5)
+V4HI_TEST(8, d, 6, a, 6)
+V4HI_TEST(9, 0x200, 0x300, 0x500, 0x8800)
+V4HI_TEST(10, 0x600, a, a, a)
+
+unsigned short a16 = 0x3344;
+unsigned short b16 = 0x5566;
+unsigned short c16 = 0x7788;
+unsigned short d16 = 0x9911;
+
+int main(void)
+{
+ test_v2hi_1 (a16, b16);
+ test_v2hi_2 (a16, b16);
+ test_v2hi_3 (a16, b16);
+ test_v2hi_4 (a16, b16);
+ test_v2hi_5 (a16, b16);
+ test_v2hi_6 (a16, b16);
+ test_v2hi_7 (a16, b16);
+ test_v2hi_8 (a16, b16);
+ test_v2hi_9 (a16, b16);
+ test_v2hi_10 (a16, b16);
+
+ test_v4hi_1 (a16, b16, c16, d16);
+ test_v4hi_2 (a16, b16, c16, d16);
+ test_v4hi_3 (a16, b16, c16, d16);
+ test_v4hi_4 (a16, b16, c16, d16);
+ test_v4hi_5 (a16, b16, c16, d16);
+ test_v4hi_6 (a16, b16, c16, d16);
+ test_v4hi_7 (a16, b16, c16, d16);
+ test_v4hi_8 (a16, b16, c16, d16);
+ test_v4hi_9 (a16, b16, c16, d16);
+ test_v4hi_10 (a16, b16, c16, d16);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3-vis1.c b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis1.c
new file mode 100644
index 00000000000..6c826108c29
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis1.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_hw } */
+/* { dg-options "-mcpu=ultrasparc -mvis -O2" } */
+
+#include "vec-init-3.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3-vis2.c b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis2.c
new file mode 100644
index 00000000000..6424e2f1592
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis2.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis2_hw } */
+/* { dg-options "-mcpu=ultrasparc3 -O2" } */
+
+#include "vec-init-3.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c
new file mode 100644
index 00000000000..226c108c5e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis3_hw } */
+/* { dg-options "-mcpu=niagara3 -O2" } */
+
+#include "vec-init-3.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3.inc b/gcc/testsuite/gcc.target/sparc/vec-init-3.inc
new file mode 100644
index 00000000000..8a3db2600a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-3.inc
@@ -0,0 +1,105 @@
+typedef unsigned char __v4qi __attribute__ ((__vector_size__ (4)));
+typedef unsigned char __v8qi __attribute__ ((__vector_size__ (8)));
+
+extern void abort (void);
+
+static void
+compare64 (int n, void *p, unsigned long long val)
+{
+ unsigned long long *x = (unsigned long long *) p;
+
+ if (*x != val)
+ abort();
+}
+
+static void
+compare32 (int n, void *p, unsigned int val)
+{
+ unsigned int *x = (unsigned int *) p;
+ if (*x != val)
+ abort();
+}
+
+#define V4QI_TEST(N, elt0, elt1, elt2, elt3) \
+static void \
+test_v4qi_##N (unsigned char a, unsigned char b, unsigned char c, unsigned char d) \
+{ \
+ __v4qi v = { (elt0), (elt1), (elt2), (elt3) }; \
+ compare32(N, &v, ((int)(elt0) << 24) | \
+ ((int)(elt1) << 16) | \
+ ((int)(elt2) << 8) | ((int)(elt3))); \
+}
+
+V4QI_TEST(1, a, a, a, a)
+V4QI_TEST(2, b, b, b, b)
+V4QI_TEST(3, a, b, c, d)
+V4QI_TEST(4, d, c, b, a)
+V4QI_TEST(5, a, 0, 0, 0)
+V4QI_TEST(6, b, 1, 1, b)
+V4QI_TEST(7, c, 5, d, 5)
+V4QI_TEST(8, 0x20, 0x30, b, a)
+V4QI_TEST(9, 0x40, 0x50, 0x60, 0x70)
+V4QI_TEST(10, 0x40, 0x50, 0x60, c)
+
+#define V8QI_TEST(N, elt0, elt1, elt2, elt3, elt4, elt5, elt6, elt7) \
+static void \
+test_v8qi_##N (unsigned char a, unsigned char b, unsigned char c, unsigned char d, \
+ unsigned char e, unsigned char f, unsigned char g, unsigned char h) \
+{ \
+ __v8qi v = { (elt0), (elt1), (elt2), (elt3), \
+ (elt4), (elt5), (elt6), (elt7) }; \
+ compare64(N, &v, ((long long)(elt0) << 56) | \
+ ((long long)(elt1) << 48) | \
+ ((long long)(elt2) << 40) | \
+ ((long long)(elt3) << 32) | \
+ ((long long)(elt4) << 24) | \
+ ((long long)(elt5) << 16) | \
+ ((long long)(elt6) << 8) | \
+ ((long long)(elt7) << 0)); \
+}
+
+V8QI_TEST(1, a, a, a, a, a, a, a, a)
+V8QI_TEST(2, a, b, c, d, e, f, g, h)
+V8QI_TEST(3, h, g, f, e, d, c, b, a)
+V8QI_TEST(4, a, b, a, b, a, b, a, b)
+V8QI_TEST(5, c, b, c, b, c, b, c, a)
+V8QI_TEST(6, a, 0, 0, 0, 0, 0, 0, 0)
+V8QI_TEST(7, b, 1, b, 1, b, 1, b, 1)
+V8QI_TEST(8, c, d, 0x20, a, 0x21, b, 0x23, c)
+V8QI_TEST(9, 1, 2, 3, 4, 5, 6, 7, 8)
+V8QI_TEST(10, a, a, b, b, c, c, d, d)
+
+unsigned char a8 = 0x33;
+unsigned char b8 = 0x55;
+unsigned char c8 = 0x77;
+unsigned char d8 = 0x99;
+unsigned char e8 = 0x11;
+unsigned char f8 = 0x22;
+unsigned char g8 = 0x44;
+unsigned char h8 = 0x66;
+
+int main(void)
+{
+ test_v4qi_1 (a8, b8, c8, d8);
+ test_v4qi_2 (a8, b8, c8, d8);
+ test_v4qi_3 (a8, b8, c8, d8);
+ test_v4qi_4 (a8, b8, c8, d8);
+ test_v4qi_5 (a8, b8, c8, d8);
+ test_v4qi_6 (a8, b8, c8, d8);
+ test_v4qi_7 (a8, b8, c8, d8);
+ test_v4qi_8 (a8, b8, c8, d8);
+ test_v4qi_9 (a8, b8, c8, d8);
+ test_v4qi_10 (a8, b8, c8, d8);
+
+ test_v8qi_1 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_2 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_3 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_4 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_5 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_6 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_7 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_8 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_9 (a8, b8, c8, d8, e8, f8, g8, h8);
+ test_v8qi_10 (a8, b8, c8, d8, e8, f8, g8, h8);
+ return 0;
+}