diff options
Diffstat (limited to 'gcc/rtlanal.c')
| -rw-r--r-- | gcc/rtlanal.c | 43 |
1 files changed, 21 insertions, 22 deletions
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index 4d7aad0dff0..4617e8ee449 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -4256,7 +4256,7 @@ cached_nonzero_bits (const_rtx x, machine_mode mode, const_rtx known_x, /* Given an expression, X, compute which bits in X can be nonzero. We don't care about bits outside of those defined in MODE. - For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is + For most X this is simply GET_MODE_MASK (GET_MODE (X)), but if X is an arithmetic operation, we can do better. */ static unsigned HOST_WIDE_INT @@ -4563,18 +4563,17 @@ nonzero_bits1 (const_rtx x, machine_mode mode, const_rtx known_x, /* If this is a SUBREG formed for a promoted variable that has been zero-extended, we know that at least the high-order bits are zero, though others might be too. */ - if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_UNSIGNED_P (x)) nonzero = GET_MODE_MASK (GET_MODE (x)) & cached_nonzero_bits (SUBREG_REG (x), GET_MODE (x), known_x, known_mode, known_ret); - inner_mode = GET_MODE (SUBREG_REG (x)); /* If the inner mode is a single word for both the host and target machines, we can compute this from which bits of the inner object might be nonzero. */ + inner_mode = GET_MODE (SUBREG_REG (x)); if (GET_MODE_PRECISION (inner_mode) <= BITS_PER_WORD - && (GET_MODE_PRECISION (inner_mode) <= HOST_BITS_PER_WIDE_INT)) + && GET_MODE_PRECISION (inner_mode) <= HOST_BITS_PER_WIDE_INT) { nonzero &= cached_nonzero_bits (SUBREG_REG (x), mode, known_x, known_mode, known_ret); @@ -4582,19 +4581,17 @@ nonzero_bits1 (const_rtx x, machine_mode mode, const_rtx known_x, /* On many CISC machines, accessing an object in a wider mode causes the high-order bits to become undefined. So they are not known to be zero. */ - if (!WORD_REGISTER_OPERATIONS - /* If this is a typical RISC machine, we only have to worry - about the way loads are extended. */ - || ((LOAD_EXTEND_OP (inner_mode) == SIGN_EXTEND - ? val_signbit_known_set_p (inner_mode, nonzero) - : LOAD_EXTEND_OP (inner_mode) != ZERO_EXTEND) - || !MEM_P (SUBREG_REG (x)))) - { - if (GET_MODE_PRECISION (GET_MODE (x)) + if ((!WORD_REGISTER_OPERATIONS + /* If this is a typical RISC machine, we only have to worry + about the way loads are extended. */ + || (LOAD_EXTEND_OP (inner_mode) == SIGN_EXTEND + ? val_signbit_known_set_p (inner_mode, nonzero) + : LOAD_EXTEND_OP (inner_mode) != ZERO_EXTEND) + || (!MEM_P (SUBREG_REG (x)) && !REG_P (SUBREG_REG (x)))) + && GET_MODE_PRECISION (GET_MODE (x)) > GET_MODE_PRECISION (inner_mode)) - nonzero |= (GET_MODE_MASK (GET_MODE (x)) - & ~GET_MODE_MASK (inner_mode)); - } + nonzero + |= (GET_MODE_MASK (GET_MODE (x)) & ~GET_MODE_MASK (inner_mode)); } break; @@ -4799,6 +4796,7 @@ num_sign_bit_copies1 (const_rtx x, machine_mode mode, const_rtx known_x, { enum rtx_code code = GET_CODE (x); unsigned int bitwidth = GET_MODE_PRECISION (mode); + machine_mode inner_mode; int num0, num1, result; unsigned HOST_WIDE_INT nonzero; @@ -4906,13 +4904,13 @@ num_sign_bit_copies1 (const_rtx x, machine_mode mode, const_rtx known_x, } /* For a smaller object, just ignore the high bits. */ - if (bitwidth <= GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x)))) + inner_mode = GET_MODE (SUBREG_REG (x)); + if (bitwidth <= GET_MODE_PRECISION (inner_mode)) { num0 = cached_num_sign_bit_copies (SUBREG_REG (x), VOIDmode, known_x, known_mode, known_ret); - return MAX (1, (num0 - - (int) (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))) - - bitwidth))); + return + MAX (1, num0 - (int) (GET_MODE_PRECISION (inner_mode) - bitwidth)); } /* For paradoxical SUBREGs on machines where all register operations @@ -4926,9 +4924,10 @@ num_sign_bit_copies1 (const_rtx x, machine_mode mode, const_rtx known_x, to the stack. */ if (WORD_REGISTER_OPERATIONS + && GET_MODE_PRECISION (inner_mode) <= BITS_PER_WORD + && LOAD_EXTEND_OP (inner_mode) == SIGN_EXTEND && paradoxical_subreg_p (x) - && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND - && MEM_P (SUBREG_REG (x))) + && (MEM_P (SUBREG_REG (x)) || REG_P (SUBREG_REG (x)))) return cached_num_sign_bit_copies (SUBREG_REG (x), mode, known_x, known_mode, known_ret); break; |