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-rw-r--r--gcc/config/riscv/riscv-vector-builtins-shapes.cc26
1 files changed, 26 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index 822588c7b6e..76262f07ce4 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -211,6 +211,19 @@ struct alu_def : public build_base
b.append_name (predication_suffixes[instance.pred]);
return b.finish_name ();
}
+
+ bool check (function_checker &c) const override
+ {
+ /* Check whether rounding mode argument is a valid immediate. */
+ if (c.base->has_rounding_mode_operand_p ())
+ {
+ if (!c.any_type_float_p ())
+ return c.require_immediate (c.arg_num () - 2, VXRM_RNU, VXRM_ROD);
+ /* TODO: We will support floating-point intrinsic modeling
+ rounding mode in the future. */
+ }
+ return true;
+ }
};
/* widen_alu_def class. Handle vwadd/vwsub. Unlike
@@ -313,6 +326,19 @@ struct narrow_alu_def : public build_base
b.append_name (predication_suffixes[instance.pred]);
return b.finish_name ();
}
+
+ bool check (function_checker &c) const override
+ {
+ /* Check whether rounding mode argument is a valid immediate. */
+ if (c.base->has_rounding_mode_operand_p ())
+ {
+ if (!c.any_type_float_p ())
+ return c.require_immediate (c.arg_num () - 2, VXRM_RNU, VXRM_ROD);
+ /* TODO: We will support floating-point intrinsic modeling
+ rounding mode in the future. */
+ }
+ return true;
+ }
};
/* move_def class. Handle vmv.v.v/vmv.v.x. */