diff options
| author | dj <dj@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-07 23:46:02 +0000 |
|---|---|---|
| committer | dj <dj@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-07 23:46:02 +0000 |
| commit | 39218c77bd3fe7d46cf07e2a2418a3146b6dceb6 (patch) | |
| tree | 4b1b44480e4b6f1c7edbc9fa2526dac32b903d16 /gcc | |
| parent | 2efce110783b2f1073797af48bf5b1e900ba7943 (diff) | |
| download | gcc-39218c77bd3fe7d46cf07e2a2418a3146b6dceb6.tar.gz | |
* config/m32c/muldiv.md (mulhisi3_c): Limit the mode of the 2nd
operand to HI mode.
(mulsi3): New.
(divsi3): New.
(udivsi3): New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@124524 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/m32c/muldiv.md | 31 |
2 files changed, 37 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9452c045524..a7df7b0eecb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2007-05-07 Naveen.H.S <naveen.hs@kpitcummins.com> + + * config/m32c/muldiv.md (mulhisi3_c): Limit the mode of the 2nd + operand to HI mode. + (mulsi3): New. + (divsi3): New. + (udivsi3): New. + 2007-05-07 Jayant Sonar <jayants@kpitcummins.com> * config/m32c/m32c.c (SYMBOL_FLAG_FUNCVEC_FUNCTION): Define. diff --git a/gcc/config/m32c/muldiv.md b/gcc/config/m32c/muldiv.md index 6913ea9a729..b6c6565baa5 100644 --- a/gcc/config/m32c/muldiv.md +++ b/gcc/config/m32c/muldiv.md @@ -82,7 +82,7 @@ (define_insn "mulhisi3_c" [(set (match_operand:SI 0 "ra_operand" "=Rsi") (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0")) - (match_operand 2 "immediate_operand" "i")))] + (match_operand:HI 2 "immediate_operand" "i")))] "" "mul.w\t%2,%1" [(set_attr "flags" "o")] @@ -159,7 +159,14 @@ }" ) - +(define_insn "mulsi3" + [(set (match_operand:SI 0 "r0123_operand" "=R02,R02") + (mult:SI (match_operand:SI 1 "r0123_operand" "%0,0") + (match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))] + "TARGET_M32C" + "mul.l\t%2,%1" + [(set_attr "flags" "o")] +) (define_expand "divmodqi4" [(set (match_dup 4) @@ -260,3 +267,23 @@ "divu.w\t%2" [(set_attr "flags" "o")] ) + +(define_insn "divsi3" + [(set (match_operand:SI 0 "r0123_operand" "=R02,R02") + (div:SI (match_operand:SI 1 "r0123_operand" "0,0") + (match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))] + "TARGET_M32C" + "div.l\t%2" + [(set_attr "flags" "o")] +) + +(define_insn "udivsi3" + [(set (match_operand:SI 0 "r0123_operand" "=R02,R02") + (udiv:SI (match_operand:SI 1 "r0123_operand" "0,0") + (match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))] + "TARGET_M32C" + "divu.l\t%2" + [(set_attr "flags" "o")] +) + + |