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| author | aldyh <aldyh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-11-08 03:20:30 +0000 |
|---|---|---|
| committer | aldyh <aldyh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-11-08 03:20:30 +0000 |
| commit | 643df0593c630691fa6877cddeefdd4c3023d444 (patch) | |
| tree | 1eb48ad31d05a9ce117bedc17115de96dffa2f0b /gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c | |
| parent | 54f3f029d816c6d1626310649adfda740e203f7b (diff) | |
| parent | d5d8f1ccc6d3972dc5cfc0949e85e0b1c9e24ee0 (diff) | |
| download | gcc-transactional-memory.tar.gz | |
* Merge from mainline rev 181122.transactional-memory
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/transactional-memory@181148 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c')
| -rw-r--r-- | gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c new file mode 100644 index 00000000000..226c108c5e5 --- /dev/null +++ b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c @@ -0,0 +1,5 @@ +/* { dg-do run } */ +/* { dg-require-effective-target ultrasparc_vis3_hw } */ +/* { dg-options "-mcpu=niagara3 -O2" } */ + +#include "vec-init-3.inc" |