2013-06-26 Basile Starynkevitch <basile@starynkevitch.net>

	{{merged with  trunk [4.9] svn rev. 196654-200426}}
	MELT branch merged with trunk rev. 200426 using svnmerge.py

[gcc/]

2013-06-26  Basile Starynkevitch  <basile@starynkevitch.net>
	{{merge with trunk [4.9] svn rev. 196654-200426}}
	* melt-runtime.c (melt_val2passflag): TODO_ggc_collect &
	TODO_do_not_ggc_collect are conditionalized.

	* melt/generated/warmelt-first+03.cc: Manually remove calls to
	MELT_TRACE_EXIT_LOCATION macro.

	* melt/generated/warmelt-base+03.cc: Ditto.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@200430 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 65 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c
new file mode 100644
index 00000000000..6fd3acc2a9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c
@@ -0,0 +1,65 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */
+
+#ifndef TYPE
+#define TYPE long long
+#endif
+
+#ifndef SIGN_TYPE
+#define SIGN_TYPE signed TYPE
+#endif
+
+#ifndef UNS_TYPE
+#define UNS_TYPE unsigned TYPE
+#endif
+
+typedef vector SIGN_TYPE v_sign;
+typedef vector UNS_TYPE  v_uns;
+
+v_sign sign_add (v_sign a, v_sign b)
+{
+  return a + b;
+}
+
+v_sign sign_sub (v_sign a, v_sign b)
+{
+  return a - b;
+}
+
+v_sign sign_shift_left (v_sign a, v_sign b)
+{
+  return a << b;
+}
+
+v_sign sign_shift_right (v_sign a, v_sign b)
+{
+  return a >> b;
+}
+
+v_uns uns_add (v_uns a, v_uns b)
+{
+  return a + b;
+}
+
+v_uns uns_sub (v_uns a, v_uns b)
+{
+  return a - b;
+}
+
+v_uns uns_shift_left (v_uns a, v_uns b)
+{
+  return a << b;
+}
+
+v_uns uns_shift_right (v_uns a, v_uns b)
+{
+  return a >> b;
+}
+
+/* { dg-final { scan-assembler-times "vaddudm" 2 } } */
+/* { dg-final { scan-assembler-times "vsubudm" 2 } } */
+/* { dg-final { scan-assembler-times "vsld"    2 } } */
+/* { dg-final { scan-assembler-times "vsrad"   1 } } */
+/* { dg-final { scan-assembler-times "vsrd"    1 } } */