diff options
author | hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-22 16:14:13 +0000 |
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committer | hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-22 16:14:13 +0000 |
commit | e737dbc0227e88c49ac122c17191e51c9091c6e0 (patch) | |
tree | 50dbe47fb6ff3e2cfbdee9bb2ea846a97f4f11d1 /gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c | |
parent | 2d77189206294ccdefcb104013b2a82802dedb79 (diff) | |
download | gcc-e737dbc0227e88c49ac122c17191e51c9091c6e0.tar.gz |
2007-05-22 H.J. Lu <hongjiu.lu@intel.com>
* gcc.dg/i386-cpuid.h (bit_SSE4_1): New.
(bit_SSE4_2): Likewise.
(bit_POPCNT): Likewise.
* gcc.target/i386/i386.exp (check_effective_target_sse4): New.
Check if assembler supports SSE4 instructions.
* gcc.target/i386/sse4_1-blendpd.c: New file.
* gcc.target/i386/sse4_1-blendps.c: Likewise.
* gcc.target/i386/sse4_1-blendvpd.c: Likewise.
* gcc.target/i386/sse4_1-blendvps.c: Likewise.
* gcc.target/i386/sse4_1-check.h: Likewise.
* gcc.target/i386/sse4_1-dppd-1.c: Likewise.
* gcc.target/i386/sse4_1-dppd-2.c: Likewise.
* gcc.target/i386/sse4_1-dpps-1.c: Likewise.
* gcc.target/i386/sse4_1-dpps-2.c: Likewise.
* gcc.target/i386/sse4_1-extractps.c: Likewise.
* gcc.target/i386/sse4_1-insertps-1.c: Likewise.
* gcc.target/i386/sse4_1-insertps-2.c: Likewise.
* gcc.target/i386/sse4_1-movntdqa.c: Likewise.
* gcc.target/i386/sse4_1-mpsadbw.c: Likewise.
* gcc.target/i386/sse4_1-packusdw.c: Likewise.
* gcc.target/i386/sse4_1-pblendvb.c: Likewise.
* gcc.target/i386/sse4_1-pblendw.c: Likewise.
* gcc.target/i386/sse4_1-pcmpeqq.c: Likewise.
* gcc.target/i386/sse4_1-pextrb.c: Likewise.
* gcc.target/i386/sse4_1-pextrd.c: Likewise.
* gcc.target/i386/sse4_1-pextrq.c: Likewise.
* gcc.target/i386/sse4_1-pextrw.c: Likewise.
* gcc.target/i386/sse4_1-phminposuw.c: Likewise.
* gcc.target/i386/sse4_1-pinsrb.c: Likewise.
* gcc.target/i386/sse4_1-pinsrd.c: Likewise.
* gcc.target/i386/sse4_1-pinsrq.c: Likewise.
* gcc.target/i386/sse4_1-pmaxsb.c: Likewise.
* gcc.target/i386/sse4_1-pmaxsd.c: Likewise.
* gcc.target/i386/sse4_1-pmaxud.c: Likewise.
* gcc.target/i386/sse4_1-pmaxuw.c: Likewise.
* gcc.target/i386/sse4_1-pminsb.c: Likewise.
* gcc.target/i386/sse4_1-pminsd.c: Likewise.
* gcc.target/i386/sse4_1-pminud.c: Likewise.
* gcc.target/i386/sse4_1-pminuw.c: Likewise.
* gcc.target/i386/sse4_1-pmovsxbd.c: Likewise.
* gcc.target/i386/sse4_1-pmovsxbq.c: Likewise.
* gcc.target/i386/sse4_1-pmovsxbw.c: Likewise.
* gcc.target/i386/sse4_1-pmovsxdq.c: Likewise.
* gcc.target/i386/sse4_1-pmovsxwd.c: Likewise.
* gcc.target/i386/sse4_1-pmovsxwq.c: Likewise.
* gcc.target/i386/sse4_1-pmovzxbd.c: Likewise.
* gcc.target/i386/sse4_1-pmovzxbq.c: Likewise.
* gcc.target/i386/sse4_1-pmovzxbw.c: Likewise.
* gcc.target/i386/sse4_1-pmovzxdq.c: Likewise.
* gcc.target/i386/sse4_1-pmovzxwd.c: Likewise.
* gcc.target/i386/sse4_1-pmovzxwq.c: Likewise.
* gcc.target/i386/sse4_1-pmuldq.c: Likewise.
* gcc.target/i386/sse4_1-pmulld.c: Likewise.
* gcc.target/i386/sse4_1-ptest-1.c: Likewise.
* gcc.target/i386/sse4_1-ptest-2.c: Likewise.
* gcc.target/i386/sse4_1-ptest-3.c: Likewise.
* gcc.target/i386/sse4_1-round.h: Likewise.
* gcc.target/i386/sse4_1-roundpd-1.c: Likewise.
* gcc.target/i386/sse4_1-roundpd-2.c: Likewise.
* gcc.target/i386/sse4_1-roundpd-3.c: Likewise.
* gcc.target/i386/sse4_1-roundps-1.c: Likewise.
* gcc.target/i386/sse4_1-roundps-2.c: Likewise.
* gcc.target/i386/sse4_1-roundps-3.c: Likewise.
* gcc.target/i386/sse4_1-roundsd-1.c: Likewise.
* gcc.target/i386/sse4_1-roundsd-2.c: Likewise.
* gcc.target/i386/sse4_1-roundsd-3.c: Likewise.
* gcc.target/i386/sse4_1-roundsd-4.c: Likewise.
* gcc.target/i386/sse4_1-roundss-1.c: Likewise.
* gcc.target/i386/sse4_1-roundss-2.c: Likewise.
* gcc.target/i386/sse4_1-roundss-3.c: Likewise.
* gcc.target/i386/sse4_1-roundss-4.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@124947 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c')
-rw-r--r-- | gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c b/gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c new file mode 100644 index 00000000000..65602d9ddf3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c @@ -0,0 +1,77 @@ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-options "-O2 -msse4.1" } */ + +#include "sse4_1-check.h" + +#include <smmintrin.h> + +static void +sse4_1_test (void) +{ + union + { + __m128i x; + unsigned int i[4]; + } val[4]; + int correct_zeros[4]; + int correct_ones[4]; + int correct_mixed[4]; + int zeros[4]; + int ones[4]; + int mixed[4]; + int i; + __m128i v; + + val[0].i[0] = 0x11111111; + val[0].i[1] = 0x00000000; + val[0].i[2] = 0x00000000; + val[0].i[3] = 0x11111111; + correct_zeros[0] = 0; + correct_ones[0] = 0; + correct_mixed[0] = 1; + + val[1].i[0] = 0x00000000; + val[1].i[1] = 0x11111111; + val[1].i[2] = 0x11111111; + val[1].i[3] = 0x00000000; + correct_zeros[1] = 0; + correct_ones[1] = 0; + correct_mixed[1] = 1; + + val[2].i[0] = 0; + val[2].i[1] = 0; + val[2].i[2] = 0; + val[2].i[3] = 0; + correct_zeros[2] = 1; + correct_ones[2] = 0; + correct_mixed[2] = 0; + + val[3].i[0] = 0xffffffff; + val[3].i[1] = 0xffffffff; + val[3].i[2] = 0xffffffff; + val[3].i[3] = 0xffffffff; + correct_zeros[3] = 0; + correct_ones[3] = 1; + correct_mixed[3] = 0; + + for (i=0; i < 4; i++) + zeros[i] = _mm_test_all_zeros (val[i].x, val[i].x); + + for( i=0; i < 4; i++ ) + ones[i] = _mm_test_all_ones (val[i].x); + + v = _mm_cmpeq_epi32 (val[0].x, val[0].x); + for( i=0; i < 4; i++ ) + mixed[i] = _mm_test_mix_ones_zeros (val[i].x, v); + + for( i=0; i < 4; i++ ) + { + if (zeros[i] != correct_zeros[i]) + abort (); + if (ones[i] != correct_ones[i]) + abort (); + if (mixed[i] != correct_mixed[i]) + abort (); + } +} |