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authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2015-06-30 16:46:45 +0000
committerH.J. Lu <hjl.tools@gmail.com>2015-09-25 14:25:58 -0700
commit3056535a769cc87c39368ad6bd53b3dacd89a591 (patch)
tree7d69c6db3b82c6a4e2f455c7761c0f8d5f13b8ae /gcc/testsuite/gcc.target/i386/iamcu/asm-support.S
parent8e7e619117d796e7b5505e753ddc49cc2dc86557 (diff)
downloadgcc-3056535a769cc87c39368ad6bd53b3dacd89a591.tar.gz
IA MCU psABI support: testsuite
We run Intel MCU psABI tests on Linux/ia32 with -miamcu. Since Intel MCU psABI has a different calling convention, the only Linux libc function allowed is "abort". asm-support.S contains some support functions as well as a subset of soft-fp, which is written in assembly with x87 instructions, to provide intrinsics needed by -miamcu so that Intel MCU psABI tests can run on Linux. * gcc.target/i386/iamcu/abi-iamcu.exp: New file. * gcc.target/i386/iamcu/args.h: Likewise. * gcc.target/i386/iamcu/asm-support.S: Likewise. * gcc.target/i386/iamcu/defines.h: Likewise. * gcc.target/i386/iamcu/macros.h: Likewise. * gcc.target/i386/iamcu/test_3_element_struct_and_unions.c: Likewise. * gcc.target/i386/iamcu/test_basic_64bit_returning.c: Likewise. * gcc.target/i386/iamcu/test_basic_alignment.c: Likewise. * gcc.target/i386/iamcu/test_basic_array_size_and_align.c: Likewise. * gcc.target/i386/iamcu/test_basic_returning.c: Likewise. * gcc.target/i386/iamcu/test_basic_sizes.c: Likewise. * gcc.target/i386/iamcu/test_basic_struct_size_and_align.c: Likewise. * gcc.target/i386/iamcu/test_basic_union_size_and_align.c: Likewise. * gcc.target/i386/iamcu/test_bitfields.c: Likewise. * gcc.target/i386/iamcu/test_complex_returning.c: Likewise. * gcc.target/i386/iamcu/test_passing_floats.c: Likewise. * gcc.target/i386/iamcu/test_passing_integers.c: Likewise. * gcc.target/i386/iamcu/test_passing_structs.c: Likewise. * gcc.target/i386/iamcu/test_passing_structs_and_unions.c: Likewise. * gcc.target/i386/iamcu/test_passing_unions.c: Likewise. * gcc.target/i386/iamcu/test_struct_returning.c: Likewise. * gcc.target/i386/iamcu/test_varargs.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@225199 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target/i386/iamcu/asm-support.S')
-rw-r--r--gcc/testsuite/gcc.target/i386/iamcu/asm-support.S302
1 files changed, 302 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/iamcu/asm-support.S b/gcc/testsuite/gcc.target/i386/iamcu/asm-support.S
new file mode 100644
index 00000000000..b4a4a140e54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/iamcu/asm-support.S
@@ -0,0 +1,302 @@
+ .comm callthis,4,4
+ .comm eax,4,4
+ .comm ebx,4,4
+ .comm ecx,4,4
+ .comm edx,4,4
+ .comm esi,4,4
+ .comm edi,4,4
+ .comm esp,4,4
+ .comm ebp,4,4
+ .comm sret_eax,4,4
+ .comm volatile_var,4,4
+
+ .text
+ .p2align 4,,15
+.globl snapshot
+ .type snapshot, @function
+snapshot:
+ movl %eax, eax
+ movl %ebx, ebx
+ movl %ecx, ecx
+ movl %edx, edx
+ movl %edi, edi
+ movl %esi, esi
+ movl %ebp, ebp
+ movl %esp, esp
+ jmp *callthis
+ .size snapshot, .-snapshot
+
+ .p2align 4,,15
+.globl snapshot_ret
+ .type snapshot_ret, @function
+snapshot_ret:
+ movl %eax, sret_eax
+ call *callthis
+ movl %eax, eax
+ movl %edx, edx
+ ret
+ .size snapshot_ret, .-snapshot_ret
+
+ .p2align 4,,15
+ .globl __nesf2
+ .type __nesf2, @function
+__nesf2:
+ .cfi_startproc
+ subl $4, %esp
+ .cfi_def_cfa_offset 8
+ movl %eax, (%esp)
+ movl $1, %eax
+ fildl (%esp)
+ movl %edx, (%esp)
+ xorl %edx, %edx
+ fildl (%esp)
+ fucomip %st(1), %st
+ fstp %st(0)
+ setp %dl
+ cmove %edx, %eax
+ addl $4, %esp
+ .cfi_def_cfa_offset 4
+ ret
+ .cfi_endproc
+ .size __nesf2, .-__nesf2
+
+ .p2align 4,,15
+ .globl __nedf2
+ .type __nedf2, @function
+__nedf2:
+ .cfi_startproc
+ pushl %ebp
+ .cfi_def_cfa_offset 8
+ .cfi_offset 5, -8
+ movl %esp, %ebp
+ .cfi_def_cfa_register 5
+ andl $-8, %esp
+ subl $8, %esp
+ movl %eax, (%esp)
+ movl $1, %eax
+ movl %edx, 4(%esp)
+ xorl %edx, %edx
+ fildq (%esp)
+ fildq 8(%ebp)
+ fucomip %st(1), %st
+ fstp %st(0)
+ setp %dl
+ cmove %edx, %eax
+ leave
+ .cfi_restore 5
+ .cfi_def_cfa 4, 4
+ ret
+ .cfi_endproc
+ .size __nedf2, .-__nedf2
+
+ .p2align 4,,15
+ .globl __addsf3
+ .type __addsf3, @function
+__addsf3:
+ .cfi_startproc
+ subl $4, %esp
+ .cfi_def_cfa_offset 8
+ movl %eax, (%esp)
+ flds (%esp)
+ movl %edx, (%esp)
+ flds (%esp)
+ faddp %st, %st(1)
+ fstps (%esp)
+ movl (%esp), %eax
+ addl $4, %esp
+ .cfi_def_cfa_offset 4
+ ret
+ .cfi_endproc
+ .size __addsf3, .-__addsf3
+
+ .p2align 4,,15
+ .globl __adddf3
+ .type __adddf3, @function
+__adddf3:
+ .cfi_startproc
+ pushl %ebp
+ .cfi_def_cfa_offset 8
+ .cfi_offset 5, -8
+ movl %esp, %ebp
+ .cfi_def_cfa_register 5
+ andl $-8, %esp
+ subl $8, %esp
+ movl %eax, (%esp)
+ movl %edx, 4(%esp)
+ fldl (%esp)
+ faddl 8(%ebp)
+ fstpl (%esp)
+ movl (%esp), %eax
+ movl 4(%esp), %edx
+ leave
+ .cfi_restore 5
+ .cfi_def_cfa 4, 4
+ ret
+ .cfi_endproc
+ .size __adddf3, .-__adddf3
+
+ .p2align 4,,15
+ .globl __floatsisf
+ .type __floatsisf, @function
+__floatsisf:
+ .cfi_startproc
+ subl $4, %esp
+ .cfi_def_cfa_offset 8
+ movl %eax, (%esp)
+ fildl (%esp)
+ addl $4, %esp
+ .cfi_def_cfa_offset 4
+ ret
+ .cfi_endproc
+ .size __floatsisf, .-__floatsisf
+
+ .p2align 4,,15
+ .globl __floatunsisf
+ .type __floatunsisf, @function
+__floatunsisf:
+ .cfi_startproc
+ subl $8, %esp
+ .cfi_def_cfa_offset 12
+ xorl %edx, %edx
+ movl %eax, (%esp)
+ movl %edx, 4(%esp)
+ fildq (%esp)
+ addl $8, %esp
+ .cfi_def_cfa_offset 4
+ ret
+ .cfi_endproc
+ .size __floatunsisf, .-__floatunsisf
+
+ .globl __extendsfdf2
+ .type __extendsfdf2, @function
+__extendsfdf2:
+ .cfi_startproc
+ pushl %ebp
+ .cfi_def_cfa_offset 8
+ .cfi_offset 5, -8
+ movl %esp, %ebp
+ .cfi_def_cfa_register 5
+ andl $-8, %esp
+ subl $8, %esp
+ movl %eax, (%esp)
+ flds (%esp)
+ fstpl (%esp)
+ movl (%esp), %eax
+ movl 4(%esp), %edx
+ leave
+ .cfi_restore 5
+ .cfi_def_cfa 4, 4
+ ret
+ .cfi_endproc
+ .size __extendsfdf2, .-__extendsfdf2
+
+ .p2align 4,,15
+ .globl __truncdfsf2
+ .type __truncdfsf2, @function
+__truncdfsf2:
+ .cfi_startproc
+ pushl %ebp
+ .cfi_def_cfa_offset 8
+ .cfi_offset 5, -8
+ movl %esp, %ebp
+ .cfi_def_cfa_register 5
+ andl $-8, %esp
+ subl $12, %esp
+ movl %eax, (%esp)
+ movl %edx, 4(%esp)
+ fldl (%esp)
+ fstps (%esp)
+ movl (%esp), %eax
+ leave
+ .cfi_restore 5
+ .cfi_def_cfa 4, 4
+ ret
+ .cfi_endproc
+ .size __truncdfsf2, .-__truncdfsf2
+
+ .p2align 4,,15
+ .globl iamcu_memset
+ .type iamcu_memset, @function
+iamcu_memset:
+ .cfi_startproc
+ pushl %edi
+ .cfi_adjust_cfa_offset 4
+ .cfi_rel_offset %edi, 0
+ movl %eax, %edi
+ movzbl %dl, %eax
+ movl %edi, %edx
+ rep stosb
+ movl %edx, %eax
+ popl %edi
+ .cfi_adjust_cfa_offset -4
+ .cfi_restore %edi
+ ret
+ .cfi_endproc
+ .size iamcu_memset, .-iamcu_memset
+
+ .p2align 4,,15
+ .globl iamcu_noprintf
+ .type iamcu_noprintf, @function
+iamcu_noprintf:
+ .cfi_startproc
+ pushl %ebp
+ .cfi_def_cfa_offset 8
+ .cfi_offset 5, -8
+ movl %esp, %ebp
+ .cfi_def_cfa_register 5
+ cmpl $-1414676753, 8(%ebp)
+ fldl 16(%ebp)
+ fldl 28(%ebp)
+ jne 7f
+ cmpl $256, 12(%ebp)
+ jne 8f
+ flds .LCiamcu_noprintf0
+ movl $1, %eax
+ fucomip %st(2), %st
+ fstp %st(1)
+ setp %dl
+ cmovne %eax, %edx
+ testb %dl, %dl
+ jne 9f
+ cmpl $-1146241297, 24(%ebp)
+ jne 10f
+ flds .LCiamcu_noprintf1
+ fucomip %st(1), %st
+ fstp %st(0)
+ setp %dl
+ cmove %edx, %eax
+ testb %al, %al
+ jne 2f
+ cmpl $259, 36(%ebp)
+ jne 2f
+ popl %ebp
+ .cfi_remember_state
+ .cfi_restore 5
+ .cfi_def_cfa 4, 4
+ ret
+7:
+ .cfi_restore_state
+ fstp %st(0)
+ fstp %st(0)
+ jmp 2f
+8:
+ fstp %st(0)
+ fstp %st(0)
+ .p2align 4,,3
+ jmp 2f
+9:
+ fstp %st(0)
+ jmp 2f
+10:
+ fstp %st(0)
+2:
+ call abort
+ .cfi_endproc
+ .size iamcu_noprintf, .-iamcu_noprintf
+ .section .rodata.cst4,"aM",@progbits,4
+ .align 4
+.LCiamcu_noprintf0:
+ .long 1132494848
+ .align 4
+.LCiamcu_noprintf1:
+ .long 1132527616