2004-07-01 Jerry Quinn <jlquinn@optonline.net>

	* alias.c (get_alias_set, canon_rtx, get_addr,
	nonoverlapping_memrefs_p, nonlocal_referenced_p_1, memory_modified_1):
	Use MEM_P.
	* builtins.c (expand_builtin_prefetch, expand_builtin_profile_func,
	expand_builtin): Likewise.
	* calls.c (expand_call, emit_library_call_value_1, store_one_arg):
	Likewise.
	* combine.c (can_combine_p, combinable_i3pat, try_combine,
	find_split_point, combine_simplify_rtx, simplify_set, make_extraction,
	rtx_equal_for_field_assignment_p, gen_lowpart_for_combine,
	record_dead_and_set_regs_1, get_last_value_validate,
	mark_used_regs_combine, move_deaths, unmentioned_reg_p_1): Likewise.
	* cse.c (check_dependence, canon_hash, equiv_constant,
	gen_lowpart_if_possible, cse_insn, invalidate_from_clobbers,
	cse_around_loop, cse_check_loop_start, cse_set_around_loop,
	count_reg_usage): Likewise.
	* cselib.c (rtx_equal_for_cselib_p, add_mem_for_addr, cselib_lookup,
	cselib_invalidate_mem, cselib_invalidate_rtx, cselib_record_set,
	cselib_record_sets): Likewise.
	* dbxout.c (PARM_PASSED_IN_MEMORY, dbxout_symbol,
	dbxout_symbol_location, dbxout_parms, dbxout_reg_parms): Likewise.
	* ddg.c (mark_mem_use, mark_mem_store, rtx_mem_access_p): Likewise.
	* df.c (df_uses_record): Likewise.
	* dojump (do_jump): Likewise.
	* dwarf2out.c (stack_adjust_offset, mem_loc_descriptor,
	loc_descriptor_from_tree, rtl_for_decl_location, add_bound_info,
	decl_start_label): Likewise.
	* emit-rtl.c (gen_complex_constant_part, gen_highpart,
	operand_subword, change_address_1, make_safe_from): Likewise.
	* explow.c (break_out_memory_refs, copy_all_regs, validize_mem,
	stabilize, force_not_mem): Likewise.
	* expmed.c (store_bit_field, store_split_bit_field, extract_bit_field,
	expand_mult_const, expand_divmod, emit_store_flag): Likewise.
	* expr.c (convert_move, convert_modes, emit_block_move,
	emit_group_load, emit_group_store, clear_storage, emit_move_insn,
	emit_move_insn_1, expand_assignment, store_expr,
	store_constructor_field, store_constructor, store_field,
	force_operand, safe_from_p, expand_expr_real_1, expand_increment):
	Likewise.
	* final.c (cleanup_subreg_operands, alter_subreg,
	get_mem_expr_from_op): Likewise.
	* flow.c (notice_stack_pointer_modification_1,
	init_propagate_block_info, insn_dead_p, mark_set_1, mark_used_regs):
	Likewise.
	* function.c (mark_temp_addr_taken, preserve_temp_slots,
	preserve_rtl_expr_result, put_var_into_stack, fixup_var_refs_1,
	optimize_bit_field, flush_addressof, purge_addressof_1,
	instantiate_decl, instantiate_virtual_regs_1, assign_parms,
	setjmp_protect, setjmp_protect_args, fix_lexical_addr,
	keep_stack_depressed): Likewise.
	* ifcvt.c (noce_try_cmove_arith, noce_try_abs, noce_operand_ok,
	noce_process_if_block, find_memory): Likewise.
	* integrate.c (subst_constants, allocate_initial_values): Likewise.
	* local-alloc.c (validate_equiv_mem_from_store, memref_referenced_p,
	update_equiv_regs): Likewise.
	* loop.c (scan_loop, prescan_loop, note_addr_stored, check_store,
	maybe_eliminate_biv_1, find_mem_in_note_1): Likewise.
	* optabs.c (expand_abs, emit_unop_insn): Likewise.
	* passes.c (rest_of_handle_final): Likewise.
	* postreload.c (reload_cse_simplify_set, reload_cse_simplify_operands,
	move2add_note_store): Likewise.
	* ra-build.c (detect_remat_webs): Likewise.
	* ra-debug.c (dump_static_insn_cost): Likewise.
	* ra-rewrite.c (slots_overlap_p, insert_stores): Likewise.
	* recog.c (validate_change, apply_change_group, cancel_changes,
	validate_replace_rtx_1, general_operand, register_operand,
	nonmemory_operand, push_operand, pop_operand, memory_operand,
	indirect_operand, asm_operand_ok, offsettable_memref_p,
	offsettable_nonstrict_memref_p, constrain_operands,
	store_data_bypass_p): Likewise.
	* reg-stack.c (subst_stack_regs_pat): Likewise.
	* regclass.c (record_operand_costs, scan_one_insn, record_reg_classes,
	copy_cost, reg_scan_mark_refs): Likewise.
	* regmove.c (optimize_reg_copy_3, stack_memref_p,
	combine_stack_adjustments_for_block): Likewise.
	* regrename.c (copyprop_hardreg_forward_1): Likewise.
	* reload.c (can_reload_into, push_reload, decompose, immune_p,
	find_reloads, find_reloads_address, find_reloads_address_1,
	reg_overlap_mentioned_for_reload_p, refers_to_mem_for_reload_p,
	find_equiv_reg): Likewise.
	* reload1.c (reload, eliminate_regs, eliminate_regs_in_insn,
	reload_as_needed, choose_reload_regs, emit_input_reload_insns,
	do_input_reload, emit_reload_insns, gen_reload, delete_output_reload,
	delete_address_reloads): Likewise.
	* resource.c (mark_referenced_resources): Likewise.
	* rtlanal.c (get_jump_table_offset, count_occurrences,
	reg_referenced_p, reg_set_p, set_of_1, set_noop_p,
	reg_overlap_mentioned_p, note_uses, replace_regs, nonzero_bits1,
	num_sign_bit_copies1): Likewise.
	* rtlhooks.c (gen_lowpart_general): Likewise.
	* sched-deps.c (sched_analyze_1, sched_analyze_2): Likewise.
	* sdbout.c (PARM_PASSED_IN_MEMORY, sdbout_symbol,
	sdbout_toplevel_data, sdbout_parms, sdbout_reg_parms,
	sdbout_global_decl): Likewise.
	* simplify-rtx.c (simplify_subreg): Likewise.
	* stmt.c (expand_asm_operands, expand_expr_stmt_value, expand_decl,
	expand_anon_union_decl, expand_end_case_type): Likewise.
	* unroll.c (calculate_giv_inc): Likewise.
	* var-tracking.c (stack_adjust_offset_pre_post,
	bb_stack_adjust_offset, track_expr_p, count_uses, add_uses,
	add_stores, compute_bb_dataflow, vt_get_decl_and_offset,
	vt_add_function_parameters): Likewise.
	* varasm.c (make_var_volatile, notice_global_symbol,
	assemble_external, decode_addr_const, mark_weak,
	default_encode_section_info): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@83980 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 32 insertions, 32 deletions

diff --git a/gcc/expmed.c b/gcc/expmed.c
index e95a62643fc..40213da57d0 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -300,7 +300,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 		 rtx value, HOST_WIDE_INT total_size)
 {
   unsigned int unit
-    = (GET_CODE (str_rtx) == MEM) ? BITS_PER_UNIT : BITS_PER_WORD;
+    = (MEM_P (str_rtx)) ? BITS_PER_UNIT : BITS_PER_WORD;
   unsigned HOST_WIDE_INT offset = bitnum / unit;
   unsigned HOST_WIDE_INT bitpos = bitnum % unit;
   rtx op0 = str_rtx;
@@ -332,7 +332,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
   /* Use vec_extract patterns for extracting parts of vectors whenever
      available.  */
   if (VECTOR_MODE_P (GET_MODE (op0))
-      && GET_CODE (op0) != MEM
+      && !MEM_P (op0)
       && (vec_set_optab->handlers[GET_MODE (op0)].insn_code
 	  != CODE_FOR_nothing)
       && fieldmode == GET_MODE_INNER (GET_MODE (op0))
@@ -396,7 +396,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 
   if (bitpos == 0
       && bitsize == GET_MODE_BITSIZE (fieldmode)
-      && (GET_CODE (op0) != MEM
+      && (!MEM_P (op0)
 	  ? ((GET_MODE_SIZE (fieldmode) >= UNITS_PER_WORD
 	     || GET_MODE_SIZE (GET_MODE (op0)) == GET_MODE_SIZE (fieldmode))
 	     && byte_offset % GET_MODE_SIZE (fieldmode) == 0)
@@ -435,7 +435,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
     enum machine_mode imode = int_mode_for_mode (GET_MODE (op0));
     if (imode != GET_MODE (op0))
       {
-	if (GET_CODE (op0) == MEM)
+	if (MEM_P (op0))
 	  op0 = adjust_address (op0, imode, 0);
 	else if (imode != BLKmode)
 	  op0 = gen_lowpart (imode, op0);
@@ -446,7 +446,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 
   /* We may be accessing data outside the field, which means
      we can alias adjacent data.  */
-  if (GET_CODE (op0) == MEM)
+  if (MEM_P (op0))
     {
       op0 = shallow_copy_rtx (op0);
       set_mem_alias_set (op0, 0);
@@ -457,14 +457,14 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
      But as we have it, it counts within whatever size OP0 now has.
      On a bigendian machine, these are not the same, so convert.  */
   if (BYTES_BIG_ENDIAN
-      && GET_CODE (op0) != MEM
+      && !MEM_P (op0)
       && unit > GET_MODE_BITSIZE (GET_MODE (op0)))
     bitpos += unit - GET_MODE_BITSIZE (GET_MODE (op0));
 
   /* Storing an lsb-aligned field in a register
      can be done with a movestrict instruction.  */
 
-  if (GET_CODE (op0) != MEM
+  if (!MEM_P (op0)
       && (BYTES_BIG_ENDIAN ? bitpos + bitsize == unit : bitpos == 0)
       && bitsize == GET_MODE_BITSIZE (fieldmode)
       && (movstrict_optab->handlers[fieldmode].insn_code
@@ -554,7 +554,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
   /* OFFSET is the number of words or bytes (UNIT says which)
      from STR_RTX to the first word or byte containing part of the field.  */
 
-  if (GET_CODE (op0) != MEM)
+  if (!MEM_P (op0))
     {
       if (offset != 0
 	  || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
@@ -615,7 +615,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	 into a register and save it back later.  */
       /* This used to check flag_force_mem, but that was a serious
 	 de-optimization now that flag_force_mem is enabled by -O2.  */
-      if (GET_CODE (op0) == MEM
+      if (MEM_P (op0)
 	  && ! ((*insn_data[(int) CODE_FOR_insv].operand[0].predicate)
 		(op0, VOIDmode)))
 	{
@@ -658,7 +658,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       volatile_ok = save_volatile_ok;
 
       /* Add OFFSET into OP0's address.  */
-      if (GET_CODE (xop0) == MEM)
+      if (MEM_P (xop0))
 	xop0 = adjust_address (xop0, byte_mode, offset);
 
       /* If xop0 is a register, we need it in MAXMODE
@@ -678,7 +678,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 
       /* We have been counting XBITPOS within UNIT.
 	 Count instead within the size of the register.  */
-      if (BITS_BIG_ENDIAN && GET_CODE (xop0) != MEM)
+      if (BITS_BIG_ENDIAN && !MEM_P (xop0))
 	xbitpos += GET_MODE_BITSIZE (maxmode) - unit;
 
       unit = GET_MODE_BITSIZE (maxmode);
@@ -971,7 +971,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
 	  /* We must do an endian conversion exactly the same way as it is
 	     done in extract_bit_field, so that the two calls to
 	     extract_fixed_bit_field will have comparable arguments.  */
-	  if (GET_CODE (value) != MEM || GET_MODE (value) == BLKmode)
+	  if (!MEM_P (value) || GET_MODE (value) == BLKmode)
 	    total_bits = BITS_PER_WORD;
 	  else
 	    total_bits = GET_MODE_BITSIZE (GET_MODE (value));
@@ -1057,7 +1057,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 		   HOST_WIDE_INT total_size)
 {
   unsigned int unit
-    = (GET_CODE (str_rtx) == MEM) ? BITS_PER_UNIT : BITS_PER_WORD;
+    = (MEM_P (str_rtx)) ? BITS_PER_UNIT : BITS_PER_WORD;
   unsigned HOST_WIDE_INT offset = bitnum / unit;
   unsigned HOST_WIDE_INT bitpos = bitnum % unit;
   rtx op0 = str_rtx;
@@ -1101,7 +1101,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
   /* Use vec_extract patterns for extracting parts of vectors whenever
      available.  */
   if (VECTOR_MODE_P (GET_MODE (op0))
-      && GET_CODE (op0) != MEM
+      && !MEM_P (op0)
       && (vec_extract_optab->handlers[GET_MODE (op0)].insn_code
 	  != CODE_FOR_nothing)
       && ((bitsize + bitnum) / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
@@ -1159,7 +1159,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
     enum machine_mode imode = int_mode_for_mode (GET_MODE (op0));
     if (imode != GET_MODE (op0))
       {
-	if (GET_CODE (op0) == MEM)
+	if (MEM_P (op0))
 	  op0 = adjust_address (op0, imode, 0);
 	else if (imode != BLKmode)
 	  op0 = gen_lowpart (imode, op0);
@@ -1170,7 +1170,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 
   /* We may be accessing data outside the field, which means
      we can alias adjacent data.  */
-  if (GET_CODE (op0) == MEM)
+  if (MEM_P (op0))
     {
       op0 = shallow_copy_rtx (op0);
       set_mem_alias_set (op0, 0);
@@ -1189,7 +1189,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
      But as we have it, it counts within whatever size OP0 now has.
      On a bigendian machine, these are not the same, so convert.  */
   if (BYTES_BIG_ENDIAN
-      && GET_CODE (op0) != MEM
+      && !MEM_P (op0)
       && unit > GET_MODE_BITSIZE (GET_MODE (op0)))
     bitpos += unit - GET_MODE_BITSIZE (GET_MODE (op0));
 
@@ -1216,12 +1216,12 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	   && (BYTES_BIG_ENDIAN
 	       ? bitpos + bitsize == BITS_PER_WORD
 	       : bitpos == 0)))
-      && ((GET_CODE (op0) != MEM
+      && ((!MEM_P (op0)
 	   && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
 				     GET_MODE_BITSIZE (GET_MODE (op0)))
 	   && GET_MODE_SIZE (mode1) != 0
 	   && byte_offset % GET_MODE_SIZE (mode1) == 0)
-	  || (GET_CODE (op0) == MEM
+	  || (MEM_P (op0)
 	      && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (op0))
 		  || (offset * BITS_PER_UNIT % bitsize == 0
 		      && MEM_ALIGN (op0) % bitsize == 0)))))
@@ -1342,7 +1342,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
   /* OFFSET is the number of words or bytes (UNIT says which)
      from STR_RTX to the first word or byte containing part of the field.  */
 
-  if (GET_CODE (op0) != MEM)
+  if (!MEM_P (op0))
     {
       if (offset != 0
 	  || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
@@ -1376,7 +1376,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	  rtx pat;
 	  enum machine_mode maxmode = mode_for_extraction (EP_extzv, 0);
 
-	  if (GET_CODE (xop0) == MEM)
+	  if (MEM_P (xop0))
 	    {
 	      int save_volatile_ok = volatile_ok;
 	      volatile_ok = 1;
@@ -1440,13 +1440,13 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	    xbitpos = unit - bitsize - xbitpos;
 
 	  /* Now convert from counting within UNIT to counting in MAXMODE.  */
-	  if (BITS_BIG_ENDIAN && GET_CODE (xop0) != MEM)
+	  if (BITS_BIG_ENDIAN && !MEM_P (xop0))
 	    xbitpos += GET_MODE_BITSIZE (maxmode) - unit;
 
 	  unit = GET_MODE_BITSIZE (maxmode);
 
 	  if (xtarget == 0
-	      || (flag_force_mem && GET_CODE (xtarget) == MEM))
+	      || (flag_force_mem && MEM_P (xtarget)))
 	    xtarget = xspec_target = gen_reg_rtx (tmode);
 
 	  if (GET_MODE (xtarget) != maxmode)
@@ -1509,7 +1509,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	  rtx pat;
 	  enum machine_mode maxmode = mode_for_extraction (EP_extv, 0);
 
-	  if (GET_CODE (xop0) == MEM)
+	  if (MEM_P (xop0))
 	    {
 	      /* Is the memory operand acceptable?  */
 	      if (! ((*insn_data[(int) CODE_FOR_extv].operand[1].predicate)
@@ -1569,13 +1569,13 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 
 	  /* XBITPOS counts within a size of UNIT.
 	     Adjust to count within a size of MAXMODE.  */
-	  if (BITS_BIG_ENDIAN && GET_CODE (xop0) != MEM)
+	  if (BITS_BIG_ENDIAN && !MEM_P (xop0))
 	    xbitpos += (GET_MODE_BITSIZE (maxmode) - unit);
 
 	  unit = GET_MODE_BITSIZE (maxmode);
 
 	  if (xtarget == 0
-	      || (flag_force_mem && GET_CODE (xtarget) == MEM))
+	      || (flag_force_mem && MEM_P (xtarget)))
 	    xtarget = xspec_target = gen_reg_rtx (tmode);
 
 	  if (GET_MODE (xtarget) != maxmode)
@@ -2514,7 +2514,7 @@ expand_mult_const (enum machine_mode mode, rtx op0, HOST_WIDE_INT val,
 
   /* Avoid referencing memory over and over.
      For speed, but also for correctness when mem is volatile.  */
-  if (GET_CODE (op0) == MEM)
+  if (MEM_P (op0))
     op0 = force_reg (mode, op0);
 
   /* ACCUM starts out either as OP0 or as a zero, depending on
@@ -3290,9 +3290,9 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	  /* Don't clobber an operand while doing a multi-step calculation.  */
 	  || ((rem_flag || op1_is_constant)
 	      && (reg_mentioned_p (target, op0)
-		  || (GET_CODE (op0) == MEM && GET_CODE (target) == MEM)))
+		  || (MEM_P (op0) && MEM_P (target))))
 	  || reg_mentioned_p (target, op1)
-	  || (GET_CODE (op1) == MEM && GET_CODE (target) == MEM)))
+	  || (MEM_P (op1) && MEM_P (target))))
     target = 0;
 
   /* Get the mode in which to perform this computation.  Normally it will
@@ -3381,9 +3381,9 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 
   /* If one of the operands is a volatile MEM, copy it into a register.  */
 
-  if (GET_CODE (op0) == MEM && MEM_VOLATILE_P (op0))
+  if (MEM_P (op0) && MEM_VOLATILE_P (op0))
     op0 = force_reg (compute_mode, op0);
-  if (GET_CODE (op1) == MEM && MEM_VOLATILE_P (op1))
+  if (MEM_P (op1) && MEM_VOLATILE_P (op1))
     op1 = force_reg (compute_mode, op1);
 
   /* If we need the remainder or if OP1 is constant, we need to
@@ -4610,7 +4610,7 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1,
   if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD * 2
       && GET_MODE_CLASS (mode) == MODE_INT
       && op1 == const0_rtx
-      && (GET_CODE (op0) != MEM || ! MEM_VOLATILE_P (op0)))
+      && (!MEM_P (op0) || ! MEM_VOLATILE_P (op0)))
     {
       if (code == EQ || code == NE)
 	{