2010-11-04 Chao-ying Fu <fu@mips.com>

	* configure.ac: Test assembler support for DSP Rev1 mult.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/mips/mips.h (ISA_HAS_DSP_MULT): New define.
	* config/mips/mips.c (CODE_FOR_mips_mult): New define.
	(CODE_FOR_mips_multu): New define.
	(mips_builtins): Move madd, maddu, msub, msubu, mult, multu from
	dspr2_32 to dsp_32.
	(mips_mulsidi3_gen_fn): Test (TARGET_FIX_R4000 && !ISA_HAS_DSP).
	Delete returns when ISA_HAS_DSPR2, because the old patterns are deleted.
	* config/mips/mips-dsp.md (mips_madd<u>, mips_msub<u>):
	New define_expand patterns.
	* config/mips/constraints.md (ka): Update the constraint to test
	ISA_HAS_DSP_MULT instead of ISA_HAS_DSPR2.
	* config/mips/mips-dspr2.md (mips_madd<u>, mips_msub<u>, mips_mult,
	mips_multu): Delete.
	* config/mips/mips.md (<u>mulsidi3_32bit): Add comments.
	Change target constraint to "ka".
	Use (!TARGET_FIX_R4000 || ISA_HAS_DSP), instead of
	(!TARGET_FIX_R4000 && !ISA_HAS_DSPR2).
	Emit the accumulator destination when ISA_HAS_DSP_MULT.
	(<u>msubsidi4): Add comments.
	Test ISA_HAS_DSP.
	Emit the accumulator destination when ISA_HAS_DSP_MULT.
	(<u>maddsidi4): Likewise.
	* doc/extend.texi (MIPS DSP Built-in Functions): Move madd, maddu,
	msub, msubu, mult, multu built-in functions from DSP r2 to DSP r1.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@166344 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 6 insertions, 6 deletions

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index de2be889bdc..95e9d8808f8 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -9646,6 +9646,12 @@ i32 __builtin_mips_lbux (void *, i32)
 i32 __builtin_mips_lhx (void *, i32)
 i32 __builtin_mips_lwx (void *, i32)
 i32 __builtin_mips_bposge32 (void)
+a64 __builtin_mips_madd (a64, i32, i32);
+a64 __builtin_mips_maddu (a64, ui32, ui32);
+a64 __builtin_mips_msub (a64, i32, i32);
+a64 __builtin_mips_msubu (a64, ui32, ui32);
+a64 __builtin_mips_mult (i32, i32);
+a64 __builtin_mips_multu (ui32, ui32);
 @end smallexample
 
 The following built-in functions map directly to a particular MIPS DSP REV 2
@@ -9665,18 +9671,12 @@ i32 __builtin_mips_cmpgdu_lt_qb (v4i8, v4i8);
 i32 __builtin_mips_cmpgdu_le_qb (v4i8, v4i8);
 a64 __builtin_mips_dpa_w_ph (a64, v2i16, v2i16);
 a64 __builtin_mips_dps_w_ph (a64, v2i16, v2i16);
-a64 __builtin_mips_madd (a64, i32, i32);
-a64 __builtin_mips_maddu (a64, ui32, ui32);
-a64 __builtin_mips_msub (a64, i32, i32);
-a64 __builtin_mips_msubu (a64, ui32, ui32);
 v2i16 __builtin_mips_mul_ph (v2i16, v2i16);
 v2i16 __builtin_mips_mul_s_ph (v2i16, v2i16);
 q31 __builtin_mips_mulq_rs_w (q31, q31);
 v2q15 __builtin_mips_mulq_s_ph (v2q15, v2q15);
 q31 __builtin_mips_mulq_s_w (q31, q31);
 a64 __builtin_mips_mulsa_w_ph (a64, v2i16, v2i16);
-a64 __builtin_mips_mult (i32, i32);
-a64 __builtin_mips_multu (ui32, ui32);
 v4i8 __builtin_mips_precr_qb_ph (v2i16, v2i16);
 v2i16 __builtin_mips_precr_sra_ph_w (i32, i32, imm0_31);
 v2i16 __builtin_mips_precr_sra_r_ph_w (i32, i32, imm0_31);