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author | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-08-04 14:02:56 +0000 |
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committer | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-08-04 14:02:56 +0000 |
commit | b83d388f3141fb19e3bb587c322d4338424d6194 (patch) | |
tree | 4287fdb54042b6ff9e7719fb8cd5fba85de2e1d4 /gcc/config | |
parent | b836fcd762c99d345f3e89e74e0fc9323561e4f4 (diff) | |
download | gcc-b83d388f3141fb19e3bb587c322d4338424d6194.tar.gz |
* arm.c (arm_gen_constant): Use SImode when preparing operands for
gen_extzv_t2.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@190143 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/arm/arm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 00ccb9280de..b799e0d0be1 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2999,8 +2999,8 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, /* Extz only supports SImode, but we can coerce the operands into that mode. */ emit_constant_insn (cond, - gen_extzv_t2 (gen_lowpart (mode, target), - gen_lowpart (mode, source), + gen_extzv_t2 (gen_lowpart (SImode, target), + gen_lowpart (SImode, source), GEN_INT (i), const0_rtx)); } |