diff options
| author | krebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-12-02 07:49:47 +0000 |
|---|---|---|
| committer | krebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-12-02 07:49:47 +0000 |
| commit | d46ab84caa512d35ad644e8b26158ae1e86bc624 (patch) | |
| tree | 4bae0577f34b971793cdf8decc06252acdb068f6 /gcc/config | |
| parent | 68795b454b1a0a6f69b16ee05ea1dc8623cc7a49 (diff) | |
| download | gcc-d46ab84caa512d35ad644e8b26158ae1e86bc624.tar.gz | |
S/390: Further bswap enhancements.
gcc/ChangeLog:
2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("bswap<mode>2"): Add support for strv and
strvg.
("bswaphi2"): New pattern.
New splitter for HI reg-reg bswap.
gcc/testsuite/ChangeLog:
2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/bswap-1.c (foo64c, foo32a, foo32c): New functions.
* gcc.target/s390/bswaphi-1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@231152 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/s390/s390.md | 38 |
1 files changed, 28 insertions, 10 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index a5335ca510a..e5db537907c 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -10451,25 +10451,43 @@ ; FIXME: There is also mvcin but we cannot use it since src and target ; may overlap. (define_insn "bswap<mode>2" - [(set (match_operand:GPR 0 "register_operand" "=d, d") - (bswap:GPR (match_operand:GPR 1 "nonimmediate_operand" " d,RT")))] + [(set (match_operand:GPR 0 "nonimmediate_operand" "=d, d,RT") + (bswap:GPR (match_operand:GPR 1 "nonimmediate_operand" " d,RT, d")))] "TARGET_CPU_ZARCH" "@ lrv<g>r\t%0,%1 - lrv<g>\t%0,%1" - [(set_attr "type" "*,load") - (set_attr "op_type" "RRE,RXY") + lrv<g>\t%0,%1 + strv<g>\t%1,%0" + [(set_attr "type" "*,load,store") + (set_attr "op_type" "RRE,RXY,RXY") (set_attr "z10prop" "z10_super")]) (define_insn "bswaphi2" - [(set (match_operand:HI 0 "register_operand" "=d") - (bswap:HI (match_operand:HI 1 "memory_operand" "RT")))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=d, d,RT") + (bswap:HI (match_operand:HI 1 "nonimmediate_operand" " d,RT, d")))] "TARGET_CPU_ZARCH" - "lrvh\t%0,%1" - [(set_attr "type" "load") - (set_attr "op_type" "RXY") + "@ + # + lrvh\t%0,%1 + strvh\t%1,%0" + [(set_attr "type" "*,load,store") + (set_attr "op_type" "RRE,RXY,RXY") (set_attr "z10prop" "z10_super")]) +(define_split + [(set (match_operand:HI 0 "register_operand" "") + (bswap:HI (match_operand:HI 1 "register_operand" "")))] + "TARGET_CPU_ZARCH" + [(set (match_dup 2) (bswap:SI (match_dup 3))) + (set (match_dup 2) (lshiftrt:SI (match_dup 2) + (const_int 16))) + (set (match_dup 0) (subreg:HI (match_dup 2) 2))] +{ + operands[2] = gen_reg_rtx (SImode); + operands[3] = simplify_gen_subreg (SImode, operands[1], HImode, 0); +}) + + ; ; Population count instruction ; |