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author | uweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-10-29 19:33:45 +0000 |
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committer | uweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-10-29 19:33:45 +0000 |
commit | a8e019faf606f5977a6d8a428dff516295737a8c (patch) | |
tree | 2c34acbf862418e277444a8ede49f1eee657fa78 /gcc/config/spu/spu.md | |
parent | 5485b95993fb050b72cda916567017a2e3698373 (diff) | |
download | gcc-a8e019faf606f5977a6d8a428dff516295737a8c.tar.gz |
ChangeLog:
2008-10-29 Stefan Schulze Frielinghaus <xxschulz@de.ibm.com>
* configure.ac [spu-*-*]: Do not set skipdirs.
* configure: Re-generate.
gcc/ChangeLog:
2008-10-29 Stefan Schulze Frielinghaus <xxschulz@de.ibm.com>
* config/spu/spu.h (FRAME_GROWS_DOWNWARD): Define.
(INITIAL_FRAME_POINTER_OFFSET): Remove.
* config/spu/spu.c (spu_initial_elimination_offset): Calculate new
offset if eliminating soft frame pointer.
* config/spu/spu.md (stack_protect_set, stack_protect_test)
(stack_protect_test_si): Add initial machine description
for Stack Smashing Protector
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@141437 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/spu/spu.md')
-rw-r--r-- | gcc/config/spu/spu.md | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md index d1fa6f03508..e7b48f56941 100644 --- a/gcc/config/spu/spu.md +++ b/gcc/config/spu/spu.md @@ -155,6 +155,8 @@ (UNSPEC_DFTSV 51) (UNSPEC_FLOAT_EXTEND 52) (UNSPEC_FLOAT_TRUNCATE 53) + (UNSPEC_SP_SET 54) + (UNSPEC_SP_TEST 55) ]) (include "predicates.md") @@ -5188,4 +5190,51 @@ DONE; DONE; }") +(define_insn "stack_protect_set" + [(set (match_operand:SI 0 "spu_mem_operand" "=m") + (unspec:SI [(match_operand:SI 1 "spu_mem_operand" "m")] UNSPEC_SP_SET)) + (set (match_scratch:SI 2 "=&r") (const_int 0))] + "" + "lq%p1\t%2,%1\;stq%p0\t%2,%0\;xor\t%2,%2,%2" + [(set_attr "length" "12") + (set_attr "type" "multi1")] +) + +(define_expand "stack_protect_test" + [(match_operand 0 "spu_mem_operand" "") + (match_operand 1 "spu_mem_operand" "") + (match_operand 2 "" "")] + "" +{ + rtx compare_result; + rtx bcomp, loc_ref; + + compare_result = gen_reg_rtx (SImode); + + emit_insn (gen_stack_protect_test_si (compare_result, + operands[0], + operands[1])); + + bcomp = gen_rtx_NE (SImode, compare_result, const0_rtx); + + loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands[2]); + + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp, + loc_ref, pc_rtx))); + + DONE; +}) + +(define_insn "stack_protect_test_si" + [(set (match_operand:SI 0 "spu_reg_operand" "=&r") + (unspec:SI [(match_operand:SI 1 "spu_mem_operand" "m") + (match_operand:SI 2 "spu_mem_operand" "m")] + UNSPEC_SP_TEST)) + (set (match_scratch:SI 3 "=&r") (const_int 0))] + "" + "lq%p1\t%0,%1\;lq%p2\t%3,%2\;ceq\t%0,%0,%3\;xor\t%3,%3,%3" + [(set_attr "length" "16") + (set_attr "type" "multi1")] +) |