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authorEric Botcazou <ebotcazou@adacore.com>2019-09-20 09:42:40 +0000
committerEric Botcazou <ebotcazou@gcc.gnu.org>2019-09-20 09:42:40 +0000
commit9ba4312712a96eba938c9d280e57f71929cdef41 (patch)
tree6204d8828d33e6b5d14284045d4b2ba91cd1d8fd /gcc/config/sparc/sparc.h
parent522da4c233cb626f66e413dabb86a0a78adaafce (diff)
downloadgcc-9ba4312712a96eba938c9d280e57f71929cdef41.tar.gz
re PR target/91269 (unaligned floating-point register with -mcpu=niagara4 -fcall-used-g6)
PR target/91269 * config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Define. From-SVN: r275994
Diffstat (limited to 'gcc/config/sparc/sparc.h')
-rw-r--r--gcc/config/sparc/sparc.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index defcba8ecd7..d14741846f5 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -711,6 +711,13 @@ along with GCC; see the file COPYING3. If not see
register window instruction in the prologue. */
#define HARD_REGNO_RENAME_OK(FROM, TO) ((FROM) != 1)
+/* Select a register mode required for caller save of hard regno REGNO.
+ Contrary to what is documented, the default is not the smallest suitable
+ mode but the largest suitable mode for the given (REGNO, NREGS) pair and
+ it quickly creates paradoxical subregs that can be problematic. */
+#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
+ ((MODE) == VOIDmode ? choose_hard_reg_mode (REGNO, NREGS, false) : (MODE))
+
/* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */