diff options
| author | hpenner <hpenner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-03-30 08:25:30 +0000 |
|---|---|---|
| committer | hpenner <hpenner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-03-30 08:25:30 +0000 |
| commit | 56bc4a550f6f6a9fa8e868ac0aacb9609c04995a (patch) | |
| tree | 83efd8553d09111a4a7bdf99ac19f4d1fe4aed48 /gcc/config/rs6000/altivec.md | |
| parent | cb93b85a7d760e792fe479e435af37455ffc501f (diff) | |
| download | gcc-56bc4a550f6f6a9fa8e868ac0aacb9609c04995a.tar.gz | |
* config/rs6000/rs6000.c (output_vec_const_move):
Find all cases of EASY_VECTOR_15_ADD_SELF.
(easy_vector_constant_add_self): Accept
all vector constant loadable by vsplt* and vadd*.
(easy_vector_same): Use easy_vector_splat_const.
(easy_vector_const): Use easy_vector_splat_const.
(easy_vector_splat_const): New function.
(gen_easy_vector_constant_add_self): New function.
* config/rs6000/rs6000-protos.c (gen_easy_vector_constant_add_self):
New prototype.
* config/rs6000/altivec.md (movv4si splitter): Change to
emit move insn with halfed vector constant.
(*movv8hi splitter): Likewise.
(*movv16qi splitter): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@80077 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/altivec.md')
| -rw-r--r-- | gcc/config/rs6000/altivec.md | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 684a5d4c4b9..3e27a1b86c2 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -124,13 +124,14 @@ [(set (match_operand:V4SI 0 "altivec_register_operand" "") (match_operand:V4SI 1 "easy_vector_constant_add_self" ""))] "TARGET_ALTIVEC && reload_completed" - [(set (match_dup 0) - (unspec:V4SI [(match_dup 3)] UNSPEC_VSPLTISW)) + [(set (match_dup 0) (match_dup 3)) (set (match_dup 0) (plus:V4SI (match_dup 0) (match_dup 0)))] " -{ operands[3] = GEN_INT (INTVAL (CONST_VECTOR_ELT (operands[1], 0)) >> 1); }") +{ + operands[3] = gen_easy_vector_constant_add_self (operands[1]); +}") (define_expand "movv8hi" [(set (match_operand:V8HI 0 "nonimmediate_operand" "") @@ -172,13 +173,14 @@ [(set (match_operand:V8HI 0 "altivec_register_operand" "") (match_operand:V8HI 1 "easy_vector_constant_add_self" ""))] "TARGET_ALTIVEC && reload_completed" - [(set (match_dup 0) - (unspec:V8HI [(match_dup 3)] UNSPEC_VSPLTISH)) + [(set (match_dup 0) (match_dup 3)) (set (match_dup 0) (plus:V8HI (match_dup 0) (match_dup 0)))] " -{ operands[3] = GEN_INT (INTVAL (CONST_VECTOR_ELT (operands[1], 0)) >> 1); }") +{ + operands[3] = gen_easy_vector_constant_add_self (operands[1]); +}") (define_expand "movv16qi" [(set (match_operand:V16QI 0 "nonimmediate_operand" "") @@ -220,13 +222,14 @@ [(set (match_operand:V16QI 0 "altivec_register_operand" "") (match_operand:V16QI 1 "easy_vector_constant_add_self" ""))] "TARGET_ALTIVEC && reload_completed" - [(set (match_dup 0) - (unspec:V16QI [(match_dup 3)] UNSPEC_VSPLTISB)) + [(set (match_dup 0) (match_dup 3)) (set (match_dup 0) (plus:V16QI (match_dup 0) (match_dup 0)))] " -{ operands[3] = GEN_INT (INTVAL (CONST_VECTOR_ELT (operands[1], 0)) >> 1); }") +{ + operands[3] = gen_easy_vector_constant_add_self (operands[1]); +}") (define_expand "movv4sf" [(set (match_operand:V4SF 0 "nonimmediate_operand" "") |