diff options
| author | tomtab <tomtab@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-02-07 10:34:47 +0000 |
|---|---|---|
| committer | tomtab <tomtab@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-02-07 10:34:47 +0000 |
| commit | f8e2f4060766d1ddb03033f25f11150edba71ace (patch) | |
| tree | e7dda8125e655d4fbed0778af7368dbd690e6bfe /gcc/config/mips | |
| parent | 0a2ca5e978804dacd7a3941f0a2c806148c1d076 (diff) | |
| download | gcc-f8e2f4060766d1ddb03033f25f11150edba71ace.tar.gz | |
MIPS: Fix mode mismatch error between Loongson builtin arguments and insn
operands.
gcc/
* config/mips/mips.c (mips_expand_builtin_insn): Convert the QImode
argument of the pshufh, psllh, psllw, psrah, psraw, psrlh, psrlw
builtins to SImode and emit a zero-extend, if necessary.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@245243 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips')
| -rw-r--r-- | gcc/config/mips/mips.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index da7fa8fcea1..7974a16541d 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -16571,9 +16571,27 @@ mips_expand_builtin_insn (enum insn_code icode, unsigned int nops, { machine_mode imode; int rangelo = 0, rangehi = 0, error_opno = 0; + rtx sireg; switch (icode) { + /* The third operand of these instructions is in SImode, so we need to + bring the corresponding builtin argument from QImode into SImode. */ + case CODE_FOR_loongson_pshufh: + case CODE_FOR_loongson_psllh: + case CODE_FOR_loongson_psllw: + case CODE_FOR_loongson_psrah: + case CODE_FOR_loongson_psraw: + case CODE_FOR_loongson_psrlh: + case CODE_FOR_loongson_psrlw: + gcc_assert (has_target_p && nops == 3 && ops[2].mode == QImode); + sireg = gen_reg_rtx (SImode); + emit_insn (gen_zero_extendqisi2 (sireg, + force_reg (QImode, ops[2].value))); + ops[2].value = sireg; + ops[2].mode = SImode; + break; + case CODE_FOR_msa_addvi_b: case CODE_FOR_msa_addvi_h: case CODE_FOR_msa_addvi_w: |