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authorrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2012-03-06 18:20:34 +0000
committerrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2012-03-06 18:20:34 +0000
commit943b78f0ba49f7d65ffac9b625780c027a940956 (patch)
tree16e7a66043117f1b10c4cb863184ef27ae5c5bc4 /gcc/config/m68k
parent220a902afa4e096172926d498e1efac23e80deb7 (diff)
downloadgcc-943b78f0ba49f7d65ffac9b625780c027a940956.tar.gz
m68k: Limit TAS to 68000 and CF ISA_B.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@185011 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m68k')
-rw-r--r--gcc/config/m68k/m68k.h1
-rw-r--r--gcc/config/m68k/sync.md4
2 files changed, 3 insertions, 2 deletions
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index dbb97561d57..42d377942e7 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -249,6 +249,7 @@ along with GCC; see the file COPYING3. If not see
/* Some instructions are common to more than one ISA. */
#define ISA_HAS_MVS_MVZ (TARGET_ISAB || TARGET_ISAC)
#define ISA_HAS_FF1 (TARGET_ISAAPLUS || TARGET_ISAC)
+#define ISA_HAS_TAS (!TARGET_COLDFIRE || TARGET_ISAB || TARGET_ISAC)
#define TUNE_68000 (m68k_tune == u68000)
#define TUNE_68010 (m68k_tune == u68010)
diff --git a/gcc/config/m68k/sync.md b/gcc/config/m68k/sync.md
index 6c840f51b60..d5cab792ba4 100644
--- a/gcc/config/m68k/sync.md
+++ b/gcc/config/m68k/sync.md
@@ -60,7 +60,7 @@
[(match_operand:QI 0 "register_operand" "") ;; bool success output
(match_operand:QI 1 "memory_operand" "") ;; memory
(match_operand:SI 2 "const_int_operand" "")] ;; model
- ""
+ "ISA_HAS_TAS"
{
rtx t = gen_reg_rtx (QImode);
emit_insn (gen_atomic_test_and_set_1 (t, operands[1]));
@@ -77,5 +77,5 @@
UNSPECV_TAS_1))
(set (match_dup 1)
(unspec_volatile:QI [(match_dup 1)] UNSPECV_TAS_2))]
- ""
+ "ISA_HAS_TAS"
"tas %1\;sne %0")