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authorlaw <law@138bc75d-0d04-0410-961f-82ee72b054a4>2015-01-22 21:24:28 +0000
committerlaw <law@138bc75d-0d04-0410-961f-82ee72b054a4>2015-01-22 21:24:28 +0000
commit8dc239d39d0cb6d1d615ba4302c60a2516b980de (patch)
tree5cc13a22d537751d7a1a6c2797a54801459e8957 /gcc/config/m68k
parentf1c9126b8518d869e89228f3e5930b24abbbc51e (diff)
downloadgcc-8dc239d39d0cb6d1d615ba4302c60a2516b980de.tar.gz
PR target/52076
* config/m68k/m68k.md (xorsi3_internal): Twiddle constraints to improve code density for small immediate to memory case. (insv): Better handle bitfield assignments when the field is being set to all ones. * config/m68k/predicates.md (reg_or_pow2_m1_operand): New operand predicate. PR target/52076 * gcc.target/m68k/pr52076-1.c: New test. * gcc.target/m68k/pr52076-2.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220015 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m68k')
-rwxr-xr-xgcc/config/m68k/.m68k.md.swpbin0 -> 16384 bytes
-rw-r--r--gcc/config/m68k/m68k.md21
-rw-r--r--gcc/config/m68k/predicates.md13
3 files changed, 29 insertions, 5 deletions
diff --git a/gcc/config/m68k/.m68k.md.swp b/gcc/config/m68k/.m68k.md.swp
new file mode 100755
index 00000000000..36d768170c0
--- /dev/null
+++ b/gcc/config/m68k/.m68k.md.swp
Binary files differ
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index d34ad1dce88..6bb296e9e0d 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -3838,9 +3838,9 @@
"")
(define_insn "xorsi3_internal"
- [(set (match_operand:SI 0 "nonimmediate_operand" "=do,m")
- (xor:SI (match_operand:SI 1 "general_operand" "%0,0")
- (match_operand:SI 2 "general_operand" "di,dKT")))]
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=d,o,m")
+ (xor:SI (match_operand:SI 1 "general_operand" "%0, 0,0")
+ (match_operand:SI 2 "general_operand" "di,dK,dKT")))]
"!TARGET_COLDFIRE"
{
@@ -5583,9 +5583,20 @@
[(set (zero_extract:SI (match_operand:SI 0 "nonimmediate_operand" "")
(match_operand:SI 1 "const_int_operand" "")
(match_operand:SI 2 "const_int_operand" ""))
- (match_operand:SI 3 "register_operand" ""))]
+ (match_operand:SI 3 "reg_or_pow2_m1_operand" ""))]
"TARGET_68020 && TARGET_BITFIELD"
- "")
+ "
+{
+ /* Special case initializing a field to all ones. */
+ if (GET_CODE (operands[3]) == CONST_INT)
+ {
+ if (exact_log2 (INTVAL (operands[3]) + 1) != INTVAL (operands[1]))
+ operands[3] = force_reg (SImode, operands[3]);
+ else
+ operands[3] = constm1_rtx;
+
+ }
+}")
(define_insn "*insv_bfins_mem"
[(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
diff --git a/gcc/config/m68k/predicates.md b/gcc/config/m68k/predicates.md
index a7b5c42e2fd..c652f109128 100644
--- a/gcc/config/m68k/predicates.md
+++ b/gcc/config/m68k/predicates.md
@@ -244,3 +244,16 @@
|| reload_in_progress
|| reload_completed));
})
+
+;; Used to detect when an operand is either a register
+;; or a constant that is all ones in its lower bits.
+;; Used by insv pattern to help detect when we're initializing
+;; a bitfield to all ones.
+
+(define_predicate "reg_or_pow2_m1_operand"
+ (match_code "reg,const_int")
+{
+ return (REG_P (op)
+ || (GET_CODE (op) == CONST_INT
+ && exact_log2 (INTVAL (op) + 1) >= 0));
+})