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| author | Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> | 2006-04-04 09:29:31 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@gcc.gnu.org> | 2006-04-04 09:29:31 +0000 |
| commit | a0cde57a943636aa436aee30acf9351f64db9ea7 (patch) | |
| tree | 5682ec3e12cb3a5289e5677f9fdbfef358418145 /gcc/config/m32r/m32r.c | |
| parent | 396940301c3bc84384c281fda97da46788e58aad (diff) | |
| download | gcc-a0cde57a943636aa436aee30acf9351f64db9ea7.tar.gz | |
re PR fortran/36276 (possible issue with opening fortran files?)
PR target/36276
* config/m32r/m32r.c (gen_compare): Removed a rule addsi3 codes to avoid a miss
optimizing at simplify_relational_operation().
* config/m32r/m32r.md (seq): Ditto. Changed reg_or_eq_int16_operand to
reg_or_uint16_operand because seq_insn has not used addsi3 already.
(seq_insn): Ditto. Removed operand check mode "P".
Changed reg_or_eq_int16_operand to reg_or_uint16_operand.
From-SVN: r112661
Diffstat (limited to 'gcc/config/m32r/m32r.c')
| -rw-r--r-- | gcc/config/m32r/m32r.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 5609b0487cc..abeea182859 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -1028,12 +1028,11 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare) { case EQ: if (GET_CODE (y) == CONST_INT - && CMP_INT16_P (INTVAL (y)) /* Reg equal to small const. */ - && y != const0_rtx) + && UINT16_P (INTVAL (y))) { rtx tmp = gen_reg_rtx (SImode); - emit_insn (gen_addsi3 (tmp, x, GEN_INT (-INTVAL (y)))); + emit_insn (gen_xorsi3 (tmp, x, GEN_INT (INTVAL (y)))); x = tmp; y = const0_rtx; } |