From a0cde57a943636aa436aee30acf9351f64db9ea7 Mon Sep 17 00:00:00 2001 From: Kazuhiro Inaoka Date: Tue, 4 Apr 2006 09:29:31 +0000 Subject: re PR fortran/36276 (possible issue with opening fortran files?) PR target/36276 * config/m32r/m32r.c (gen_compare): Removed a rule addsi3 codes to avoid a miss optimizing at simplify_relational_operation(). * config/m32r/m32r.md (seq): Ditto. Changed reg_or_eq_int16_operand to reg_or_uint16_operand because seq_insn has not used addsi3 already. (seq_insn): Ditto. Removed operand check mode "P". Changed reg_or_eq_int16_operand to reg_or_uint16_operand. From-SVN: r112661 --- gcc/config/m32r/m32r.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'gcc/config/m32r/m32r.c') diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 5609b0487cc..abeea182859 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -1028,12 +1028,11 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare) { case EQ: if (GET_CODE (y) == CONST_INT - && CMP_INT16_P (INTVAL (y)) /* Reg equal to small const. */ - && y != const0_rtx) + && UINT16_P (INTVAL (y))) { rtx tmp = gen_reg_rtx (SImode); - emit_insn (gen_addsi3 (tmp, x, GEN_INT (-INTVAL (y)))); + emit_insn (gen_xorsi3 (tmp, x, GEN_INT (INTVAL (y)))); x = tmp; y = const0_rtx; } -- cgit v1.2.1