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| author | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-02-23 15:24:02 +0000 |
|---|---|---|
| committer | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-02-23 15:24:02 +0000 |
| commit | 78624f54126e08b382f81829ee419c20e884254d (patch) | |
| tree | 61717b288287207bcc2612ca43f910d60cae39cf /gcc/config/i386/mmx.md | |
| parent | ed3f349a223902d9216843e0a80a8666f1069b66 (diff) | |
| download | gcc-78624f54126e08b382f81829ee419c20e884254d.tar.gz | |
PR target/22076
PR target/34256
* config/i386/mmx.md (*mov<mode>_internal_rex64): Use "!y" to
prevent reload from using MMX registers.
(*mov<mode>_internal): Ditto.
(*movv2sf_internal_rex64): Ditto.
(*movv2sf_internal): Ditto.
testsuite/ChangeLog:
PR target/22076
PR target/34256
* gcc.target/i386/pr22076.c: New test.
* gcc.target/i386/pr34256.c: New test.
* gcc.target/i386/vecinit-5.c: New test.
* gcc.target/i386/vecinit-6.c: New test.
* gcc.target/i386/vecinit-[1-4].c: Check that no MMX register is used.
* g++.dg/compat/struct-layout-1.h: Do not include <mmintrin.h> and
<xmmintrin.h>, define __m64 and __m128 directly.
* g++.dg/compat/struct-layout-1_generate.c: Add -mno-mmx for x86.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@132572 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/mmx.md')
| -rw-r--r-- | gcc/config/i386/mmx.md | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index ee819936f6e..3371161f82f 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -63,9 +63,9 @@ (define_insn "*mov<mode>_internal_rex64" [(set (match_operand:MMXMODEI 0 "nonimmediate_operand" - "=rm,r,*y,*y ,m ,*y,Y2,x,x ,m,r,x") + "=rm,r,!y,!y ,m ,!y,Y2,x,x ,m,r,x") (match_operand:MMXMODEI 1 "vector_move_operand" - "Cr ,m,C ,*ym,*y,Y2,*y,C,xm,x,x,r"))] + "Cr ,m,C ,!ym,!y,Y2,!y,C,xm,x,x,r"))] "TARGET_64BIT && TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "@ @@ -87,9 +87,9 @@ (define_insn "*mov<mode>_internal" [(set (match_operand:MMXMODEI 0 "nonimmediate_operand" - "=*y,*y ,m ,*y ,*Y2,*Y2,*Y2 ,m ,*x,*x,*x,m ,?r ,?m") + "=!y,!y ,m ,!y ,*Y2,*Y2,*Y2 ,m ,*x,*x,*x,m ,?r ,?m") (match_operand:MMXMODEI 1 "vector_move_operand" - "C ,*ym,*y,*Y2,*y ,C ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))] + "C ,!ym,!y,*Y2,!y ,C ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))] "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "@ @@ -122,9 +122,9 @@ (define_insn "*movv2sf_internal_rex64" [(set (match_operand:V2SF 0 "nonimmediate_operand" - "=rm,r,*y ,*y ,m ,*y,Y2,x,x,x,m,r,x") + "=rm,r,!y ,!y ,m ,!y,Y2,x,x,x,m,r,x") (match_operand:V2SF 1 "vector_move_operand" - "Cr ,m ,C ,*ym,*y,Y2,*y,C,x,m,x,x,r"))] + "Cr ,m ,C ,!ym,!y,Y2,!y,C,x,m,x,x,r"))] "TARGET_64BIT && TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "@ @@ -147,9 +147,9 @@ (define_insn "*movv2sf_internal" [(set (match_operand:V2SF 0 "nonimmediate_operand" - "=*y,*y ,m,*y ,*Y2,*x,*x,*x,m ,?r ,?m") + "=!y,!y ,m,!y ,*Y2,*x,*x,*x,m ,?r ,?m") (match_operand:V2SF 1 "vector_move_operand" - "C ,*ym,*y,*Y2,*y ,C ,*x,m ,*x,irm,r"))] + "C ,!ym,!y,*Y2,!y ,C ,*x,m ,*x,irm,r"))] "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "@ |