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author | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-06-23 11:39:32 +0000 |
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committer | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-06-23 11:39:32 +0000 |
commit | 01145ae6d4895458e2c29d4e0e4e4dca23d183c2 (patch) | |
tree | d40bc79e1b8cf1a29e8de01cb7e51a378f3533ae /gcc/ChangeLog | |
parent | 42da0a294213ba2fd637f5302c450db756e0f9ce (diff) | |
download | gcc-01145ae6d4895458e2c29d4e0e4e4dca23d183c2.tar.gz |
* PR target/15948
* arm.md (bicsi3_cbranch): Add alternative to handle tying operands
one and two.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@83549 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/ChangeLog')
-rw-r--r-- | gcc/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 534cfae2cae..db45e7e2e9e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2004-06-23 Richard Earnshaw <rearnsha@arm.com> + * PR target/15948 + * arm.md (bicsi3_cbranch): Add alternative to handle tying operands + one and two. + +2004-06-23 Richard Earnshaw <rearnsha@arm.com> + PR target/15927 * arm.h (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Don't need a secondary reload if CLASS is BASE_REGS. |