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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2013-03-20 08:07:51 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2013-03-20 08:07:51 +0000
commitac721588bf707c83d6e4af0a4d1135e7077d0139 (patch)
tree39003f927843c49c03ef5f07a2b29ef9f5bfcef7
parenta2d1e432980e807d06d9540548634773cc2d5629 (diff)
downloadgcc-ac721588bf707c83d6e4af0a4d1135e7077d0139.tar.gz
gcc/
* config/mips/constraints.md (T): Rename to... (Yf): ...this. (U): Rename to... (Yd): ...this. * config/mips/mips.md (*movdi_64bit, *movdi_64bit_mips16) (*mov<mode>_internal, *mov<mode>_mips16): Update accordingly. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@196807 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/mips/constraints.md32
-rw-r--r--gcc/config/mips/mips.md8
3 files changed, 29 insertions, 20 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 803ae88d3bd..7158eea6185 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2013-03-20 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/constraints.md (T): Rename to...
+ (Yf): ...this.
+ (U): Rename to...
+ (Yd): ...this.
+ * config/mips/mips.md (*movdi_64bit, *movdi_64bit_mips16)
+ (*mov<mode>_internal, *mov<mode>_mips16): Update accordingly.
+
2013-03-19 Ian Bolton <ian.bolton@arm.com>
* config/aarch64/aarch64.md (*sub<mode>3_carryin): New pattern.
diff --git a/gcc/config/mips/constraints.md b/gcc/config/mips/constraints.md
index 71ec938d85b..53df75b4ca3 100644
--- a/gcc/config/mips/constraints.md
+++ b/gcc/config/mips/constraints.md
@@ -170,22 +170,6 @@
(and (match_operand 0 "call_insn_operand")
(match_test "CONSTANT_P (op)")))
-(define_constraint "T"
- "@internal
- A constant @code{move_operand} that cannot be safely loaded into @code{$25}
- using @code{la}."
- (and (match_operand 0 "move_operand")
- (match_test "CONSTANT_P (op)")
- (match_test "mips_dangerous_for_la25_p (op)")))
-
-(define_constraint "U"
- "@internal
- A constant @code{move_operand} that can be safely loaded into @code{$25}
- using @code{la}."
- (and (match_operand 0 "move_operand")
- (match_test "CONSTANT_P (op)")
- (not (match_test "mips_dangerous_for_la25_p (op)"))))
-
(define_memory_constraint "W"
"@internal
A memory address based on a member of @code{BASE_REG_CLASS}. This is
@@ -220,6 +204,22 @@
"@internal"
(match_operand 0 "qi_mask_operand"))
+(define_constraint "Yd"
+ "@internal
+ A constant @code{move_operand} that can be safely loaded into @code{$25}
+ using @code{la}."
+ (and (match_operand 0 "move_operand")
+ (match_test "CONSTANT_P (op)")
+ (not (match_test "mips_dangerous_for_la25_p (op)"))))
+
+(define_constraint "Yf"
+ "@internal
+ A constant @code{move_operand} that cannot be safely loaded into @code{$25}
+ using @code{la}."
+ (and (match_operand 0 "move_operand")
+ (match_test "CONSTANT_P (op)")
+ (match_test "mips_dangerous_for_la25_p (op)")))
+
(define_constraint "Yh"
"@internal"
(match_operand 0 "hi_mask_operand"))
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 7aa461dbd69..18ae4230200 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -4268,7 +4268,7 @@
(define_insn "*movdi_64bit"
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,e,d,m,*f,*f,*d,*m,*a,*d,*B*C*D,*B*C*D,*d,*m")
- (match_operand:DI 1 "move_operand" "d,U,T,m,dJ,*d*J,*m,*f,*f,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
+ (match_operand:DI 1 "move_operand" "d,Yd,Yf,m,dJ,*d*J,*m,*f,*f,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
"TARGET_64BIT && !TARGET_MIPS16
&& (register_operand (operands[0], DImode)
|| reg_or_0_operand (operands[1], DImode))"
@@ -4278,7 +4278,7 @@
(define_insn "*movdi_64bit_mips16"
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,y,d,d,d,d,d,d,m,*d")
- (match_operand:DI 1 "move_operand" "d,d,y,K,N,U,kf,m,d,*a"))]
+ (match_operand:DI 1 "move_operand" "d,d,y,K,N,Yd,kf,m,d,*a"))]
"TARGET_64BIT && TARGET_MIPS16
&& (register_operand (operands[0], DImode)
|| register_operand (operands[1], DImode))"
@@ -4346,7 +4346,7 @@
(define_insn "*mov<mode>_internal"
[(set (match_operand:IMOVE32 0 "nonimmediate_operand" "=d,d,e,d,m,*f,*f,*d,*m,*d,*z,*a,*d,*B*C*D,*B*C*D,*d,*m")
- (match_operand:IMOVE32 1 "move_operand" "d,U,T,m,dJ,*d*J,*m,*f,*f,*z,*d,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
+ (match_operand:IMOVE32 1 "move_operand" "d,Yd,Yf,m,dJ,*d*J,*m,*f,*f,*z,*d,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
"!TARGET_MIPS16
&& (register_operand (operands[0], <MODE>mode)
|| reg_or_0_operand (operands[1], <MODE>mode))"
@@ -4356,7 +4356,7 @@
(define_insn "*mov<mode>_mips16"
[(set (match_operand:IMOVE32 0 "nonimmediate_operand" "=d,y,d,d,d,d,d,d,m,*d")
- (match_operand:IMOVE32 1 "move_operand" "d,d,y,K,N,U,kf,m,d,*a"))]
+ (match_operand:IMOVE32 1 "move_operand" "d,d,y,K,N,Yd,kf,m,d,*a"))]
"TARGET_MIPS16
&& (register_operand (operands[0], <MODE>mode)
|| register_operand (operands[1], <MODE>mode))"