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authorclyon <clyon@138bc75d-0d04-0410-961f-82ee72b054a4>2013-10-17 20:57:21 +0000
committerclyon <clyon@138bc75d-0d04-0410-961f-82ee72b054a4>2013-10-17 20:57:21 +0000
commita7efbc786f29a5d30c66daf5b59778bc4cf00893 (patch)
tree3a56112842b17a933b537210351211c3cd0cc105
parent58a33da3accd2346795ae28f9f814e34e59bfed9 (diff)
downloadgcc-a7efbc786f29a5d30c66daf5b59778bc4cf00893.tar.gz
2013-10-17 Charles Bayis <charles.baylis@linaro.org>
* gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI targets. * gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets. * gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require effective target arm_thumb1_ok. * lib/target-supports.exp (check_effective_target_arm_fp16_ok_nocache): Don't force -mfloat-abi=soft when building for hardfloat target. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203799 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/testsuite/ChangeLog10
-rw-r--r--gcc/testsuite/gcc.dg/builtin-apply2.c2
-rw-r--r--gcc/testsuite/gcc.dg/tls/pr42894.c1
-rw-r--r--gcc/testsuite/gcc.target/arm/thumb-ltu.c2
-rw-r--r--gcc/testsuite/lib/target-supports.exp5
5 files changed, 17 insertions, 3 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c3e2d1135e3..4e7cb4f1e6b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2013-10-17 Charles Bayis <charles.baylis@linaro.org>
+
+ * gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI targets.
+ * gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets.
+ * gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require
+ effective target arm_thumb1_ok.
+ * lib/target-supports.exp
+ (check_effective_target_arm_fp16_ok_nocache): Don't force
+ -mfloat-abi=soft when building for hardfloat target.
+
2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/58673
diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c b/gcc/testsuite/gcc.dg/builtin-apply2.c
index daaef477894..869f337a9a5 100644
--- a/gcc/testsuite/gcc.dg/builtin-apply2.c
+++ b/gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,6 +1,6 @@
/* { dg-do run } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */
-/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */
+/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm*-*-* && arm_hf_eabi } { "*" } { "" } } */
/* PR target/12503 */
/* Origin: <pierre.nguyen-tuong@asim.lip6.fr> */
diff --git a/gcc/testsuite/gcc.dg/tls/pr42894.c b/gcc/testsuite/gcc.dg/tls/pr42894.c
index c3bd76c91c4..2875b494c05 100644
--- a/gcc/testsuite/gcc.dg/tls/pr42894.c
+++ b/gcc/testsuite/gcc.dg/tls/pr42894.c
@@ -1,6 +1,5 @@
/* PR target/42894 */
/* { dg-do compile } */
-/* { dg-options "-march=armv5te -mthumb" { target arm*-*-* } } */
/* { dg-require-effective-target tls } */
extern __thread int t;
diff --git a/gcc/testsuite/gcc.target/arm/thumb-ltu.c b/gcc/testsuite/gcc.target/arm/thumb-ltu.c
index 24671213e5f..d057ea34d25 100644
--- a/gcc/testsuite/gcc.target/arm/thumb-ltu.c
+++ b/gcc/testsuite/gcc.target/arm/thumb-ltu.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv6" "-march=armv6j" "-march=armv6z" } } */
+/* { dg-require-effective-target arm_thumb1_ok } */
/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */
void f(unsigned a, unsigned b, unsigned c, unsigned d)
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 5557c066a7f..8701cf6c21d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2467,6 +2467,11 @@ proc check_effective_target_arm_fp16_ok_nocache { } {
# Must generate floating-point instructions.
return 0
}
+ if [check_effective_target_arm_hf_eabi] {
+ # Use existing float-abi and force an fpu which supports fp16
+ set et_arm_fp16_flags "-mfpu=vfpv4"
+ return 1;
+ }
if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
# The existing -mfpu value is OK; use it, but add softfp.
set et_arm_fp16_flags "-mfloat-abi=softfp"