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| author | “Ajit Kumar Agarwal” <aagarwa1@linux.ibm.com> | 2023-05-16 10:47:15 -0500 |
|---|---|---|
| committer | “Ajit Kumar Agarwal” <aagarwa1@linux.ibm.com> | 2023-05-16 10:49:19 -0500 |
| commit | 9417b30499ce09996b4f1b4e2ce75a2853865ed4 (patch) | |
| tree | 576ede211784ecc3ffa228e8a076ad458d27ae9b | |
| parent | 008cbecf622a413ebcc8b41a737f30fd7e2a1abf (diff) | |
| download | gcc-9417b30499ce09996b4f1b4e2ce75a2853865ed4.tar.gz | |
rs6000: Enable REE pass by default
Add ree pass as a default pass for rs6000 target for
O2 and above.
2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
gcc/ChangeLog:
* common/config/rs6000/rs6000-common.cc: Add REE pass as a
default rs6000 target pass for O2 and above.
* doc/invoke.texi: Document -free
| -rw-r--r-- | gcc/common/config/rs6000/rs6000-common.cc | 2 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/gcc/common/config/rs6000/rs6000-common.cc b/gcc/common/config/rs6000/rs6000-common.cc index 2140c442ba9..968db215028 100644 --- a/gcc/common/config/rs6000/rs6000-common.cc +++ b/gcc/common/config/rs6000/rs6000-common.cc @@ -34,6 +34,8 @@ static const struct default_options rs6000_option_optimization_table[] = { OPT_LEVELS_ALL, OPT_fsplit_wide_types_early, NULL, 1 }, /* Enable -fsched-pressure for first pass instruction scheduling. */ { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 }, + /* Enable -free for zero extension and sign extension elimination.*/ + { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 }, /* Enable -munroll-only-small-loops with -funroll-loops to unroll small loops at -O2 and above by default. */ { OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_funroll_loops, NULL, 1 }, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index b92b8576027..2c525762171 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12455,8 +12455,8 @@ Attempt to remove redundant extension instructions. This is especially helpful for the x86-64 architecture, which implicitly zero-extends in 64-bit registers after writing to their lower 32-bit half. -Enabled for Alpha, AArch64 and x86 at levels @option{-O2}, -@option{-O3}, @option{-Os}. +Enabled for Alpha, AArch64, PowerPC, RISC-V, SPARC, h83000 and x86 at levels +@option{-O2}, @option{-O3}, @option{-Os}. @opindex fno-lifetime-dse @opindex flifetime-dse |