diff options
| author | bernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-07-14 17:06:33 +0000 |
|---|---|---|
| committer | bernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-07-14 17:06:33 +0000 |
| commit | 7ea22d302d51448cf19d904464f42b2d78f9deba (patch) | |
| tree | 1a31d7edb076083bf82c49b4b67996cc33756542 | |
| parent | decac88d55803b4451b93cbab9f6fdd307fe6f04 (diff) | |
| download | gcc-7ea22d302d51448cf19d904464f42b2d78f9deba.tar.gz | |
PR rtl-optimization/11320
* config/ia64/ia64.md (load_symptr_low): Show a MEM.
* config/ia64/ia64.c (ia64_expand_load_address): Generate it.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@176280 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/ia64/ia64.c | 2 | ||||
| -rw-r--r-- | gcc/config/ia64/ia64.md | 2 |
3 files changed, 9 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5ffb0dc644e..a4a1a23d3f4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ +2011-07-14 Bernd Schmidt <bernds@codesourcery.com> + + PR rtl-optimization/11320 + * config/ia64/ia64.md (load_symptr_low): Show a MEM. + * config/ia64/ia64.c (ia64_expand_load_address): Generate it. + 2011-07-14 Georg-Johann Lay <avr@gjlay.de> - + PR target/49487 * config/avr/avr.md (rotl<mode>3): Generate SCRATCH instead of REG. diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 2ebb225ec8b..c21eb9643ac 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -1047,7 +1047,7 @@ ia64_expand_load_address (rtx dest, rtx src) tmp = gen_rtx_PLUS (Pmode, tmp, pic_offset_table_rtx); emit_insn (gen_rtx_SET (VOIDmode, dest, tmp)); - tmp = gen_rtx_LO_SUM (Pmode, dest, src); + tmp = gen_rtx_LO_SUM (Pmode, gen_const_mem (Pmode, dest), src); emit_insn (gen_rtx_SET (VOIDmode, dest, tmp)); if (addend) diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index c258ca5b7a5..46eebc25ad8 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -777,7 +777,7 @@ (define_insn "*load_symptr_low" [(set (match_operand:DI 0 "register_operand" "=r") - (lo_sum:DI (match_operand:DI 1 "register_operand" "r") + (lo_sum:DI (mem:DI (match_operand:DI 1 "register_operand" "r")) (match_operand 2 "got_symbolic_operand" "s")))] "reload_completed" { |