* config/ns32k/ns32k.h (target_flags, MASK_32081, MASK_RTD)

	(MASK_REGPARM, MASK_32532, MASK_32332, MASK_NO_SB, MASK_NO_BITFIELD)
	(MASK_HIMEM, MASK_32381, MASK_MULT_ADD, MASK_SRC, MASK_IEEE_COMPARE)
	(TARGET_32081, TARGET_32381, TARGET_MULT_ADD, TARGET_RTD)
	(TARGET_REGPARM, TARGET_32532, TARGET_32332, TARGET_SB, TARGET_HIMEM)
	(TARGET_BITFIELD, TARGET_IEEE_COMPARE, TARGET_SWITCHES): Delete.
	(OVERRIDE_OPTIONS): Clear MASK_SB instead of setting MASK_NO_SB.
	* config/ns32k/netbsd.h (TARGET_DEFAULT): Remove MASK_NO_SB and
	MASK_NO_BITFIELD.
	* config/ns32k/ns32k.c (ns32k_handle_option): New function.
	(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
	* config/ns32k/ns32k.opt: New file.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@98018 138bc75d-0d04-0410-961f-82ee72b054a4

5 files changed, 160 insertions, 96 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b75e04a718d..52c5cc64854 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,20 @@
 2005-04-12  Richard Sandiford  <rsandifo@redhat.com>
 
+	* config/ns32k/ns32k.h (target_flags, MASK_32081, MASK_RTD)
+	(MASK_REGPARM, MASK_32532, MASK_32332, MASK_NO_SB, MASK_NO_BITFIELD)
+	(MASK_HIMEM, MASK_32381, MASK_MULT_ADD, MASK_SRC, MASK_IEEE_COMPARE)
+	(TARGET_32081, TARGET_32381, TARGET_MULT_ADD, TARGET_RTD)
+	(TARGET_REGPARM, TARGET_32532, TARGET_32332, TARGET_SB, TARGET_HIMEM)
+	(TARGET_BITFIELD, TARGET_IEEE_COMPARE, TARGET_SWITCHES): Delete.
+	(OVERRIDE_OPTIONS): Clear MASK_SB instead of setting MASK_NO_SB.
+	* config/ns32k/netbsd.h (TARGET_DEFAULT): Remove MASK_NO_SB and
+	MASK_NO_BITFIELD.
+	* config/ns32k/ns32k.c (ns32k_handle_option): New function.
+	(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
+	* config/ns32k/ns32k.opt: New file.
+
+2005-04-12  Richard Sandiford  <rsandifo@redhat.com>
+
 	* config.gcc (m68k-*-linux*): Add m68k/ieee.opt to $extra_options.
 	* config/m68k/m68k.h (target_flags, MASK_68020, TARGET_68020)
 	(MASK_68030, TARGET_68030, MASK_68040, TARGET_68040, MASK_68040_ONLY)
diff --git a/gcc/config/ns32k/netbsd.h b/gcc/config/ns32k/netbsd.h
index e30c496c36b..f0e8cf009aa 100644
--- a/gcc/config/ns32k/netbsd.h
+++ b/gcc/config/ns32k/netbsd.h
@@ -36,8 +36,7 @@ Boston, MA 02111-1307, USA.  */
 
 #undef TARGET_DEFAULT
 #define TARGET_DEFAULT \
-  (MASK_32532 | MASK_NO_SB | MASK_NO_BITFIELD | \
-   MASK_32381 | MASK_IEEE_COMPARE | MASK_MULT_ADD)
+  (MASK_32532 | MASK_32381 | MASK_IEEE_COMPARE | MASK_MULT_ADD)
 
 /* 32-bit alignment for efficiency */
 
diff --git a/gcc/config/ns32k/ns32k.c b/gcc/config/ns32k/ns32k.c
index bad908d49d5..8cf3fa7d1cb 100644
--- a/gcc/config/ns32k/ns32k.c
+++ b/gcc/config/ns32k/ns32k.c
@@ -64,6 +64,7 @@ const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
 
 static const char *const ns32k_out_reg_names[] = OUTPUT_REGISTER_NAMES;
 
+static bool ns32k_handle_option (size_t, const char *, int);
 static rtx gen_indexed_expr (rtx, rtx, rtx);
 static const char *singlemove_string (rtx *);
 static void move_tail (rtx[], int, int);
@@ -94,6 +95,11 @@ static int ns32k_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
 #undef TARGET_ASM_FUNCTION_EPILOGUE
 #define TARGET_ASM_FUNCTION_EPILOGUE ns32k_output_function_epilogue
 
+#undef TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
+#undef TARGET_HANDLE_OPTION
+#define TARGET_HANDLE_OPTION ns32k_handle_option
+
 #undef TARGET_RTX_COSTS
 #define TARGET_RTX_COSTS ns32k_rtx_costs
 #undef TARGET_ADDRESS_COST
@@ -110,6 +116,35 @@ static int ns32k_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
 
 struct gcc_target targetm = TARGET_INITIALIZER;
 
+/* Implement TARGET_HANDLE_OPTION.  */
+
+static bool
+ns32k_handle_option (size_t code, const char *arg ATTRIBUTE_UNUSED,
+		     int value ATTRIBUTE_UNUSED)
+{
+  switch (code)
+    {
+    case OPT_m32081:
+      target_flags &= ~MASK_32381;
+      return true;
+
+    case OPT_msoft_float:
+      target_flags &= ~(MASK_32081 | MASK_32381);
+      return true;
+
+    case OPT_m32332:
+      target_flags &= ~MASK_32532;
+      return true;
+
+    case OPT_m32032:
+      target_flags &= ~(MASK_32332 | MASK_32532);
+      return true;
+
+    default:
+      return true;
+    }
+}
+
 /* Generate the assembly code for function entry.  FILE is a stdio
    stream to output the code to.  SIZE is an int: how many units of
    temporary storage to allocate.
diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h
index 414656b6053..db7df7d2691 100644
--- a/gcc/config/ns32k/ns32k.h
+++ b/gcc/config/ns32k/ns32k.h
@@ -78,99 +78,6 @@ Boston, MA 02111-1307, USA.  */
 #define PUT_EXTERNAL_PREFIX(FILE)
 #endif
 
-/* Run-time compilation parameters selecting different hardware subsets.  */
-
-extern int target_flags;
-
-/* Masks for target_flags */
-#define MASK_32081		1
-#define MASK_RTD		2
-#define MASK_REGPARM		4
-#define MASK_32532		8
-#define MASK_32332		16
-#define MASK_NO_SB		32
-#define MASK_NO_BITFIELD	64
-#define MASK_HIMEM		128
-#define MASK_32381		256
-#define MASK_MULT_ADD		512
-#define MASK_SRC		1024
-#define MASK_IEEE_COMPARE 2048
-
-/* Macros used in the machine description to test the flags.  */
-
-/* Compile 32081 insns for floating point (not library calls). */
-#define TARGET_32081 (target_flags & MASK_32081)
-#define TARGET_32381 (target_flags & MASK_32381)
-
-/* The use of multiply-add instructions is optional because there may
- * be cases where it produces worse code.
- */
-
-#define TARGET_MULT_ADD (target_flags & MASK_MULT_ADD)
-
-/* Compile using rtd insn calling sequence.
-   This will not work unless you use prototypes at least
-   for all functions that can take varying numbers of args.  */
-#define TARGET_RTD (target_flags & MASK_RTD)
-
-/* Compile passing first two args in regs 0 and 1.  */
-#define TARGET_REGPARM (target_flags & MASK_REGPARM)
-
-/* Options to select type of CPU, for better optimization.
-   The output is correct for any kind of 32000 regardless of these options.  */
-#define TARGET_32532 (target_flags & MASK_32532)
-#define TARGET_32332 (target_flags & MASK_32332)
-
-/* Ok to use the static base register (and presume it's 0) */
-#define TARGET_SB    ((target_flags & MASK_NO_SB) == 0)
-
-#define TARGET_HIMEM (target_flags & MASK_HIMEM)
-
-/* Compile using bit-field insns.  */
-#define TARGET_BITFIELD ((target_flags & MASK_NO_BITFIELD) == 0)
-
-#define TARGET_IEEE_COMPARE (target_flags & MASK_IEEE_COMPARE)
-
-/* Macro to define tables used to set the flags.
-   This is a list in braces of pairs in braces,
-   each pair being { "NAME", VALUE }
-   where VALUE is the bits to set or minus the bits to clear.
-   An empty string NAME is used to identify the default VALUE.  */
-#define TARGET_SWITCHES							\
-  { { "32081", MASK_32081, N_("Use hardware fp")},			\
-    { "soft-float", -(MASK_32081|MASK_32381),				\
-      N_("Don't use hardware fp")},					\
-    { "rtd", MASK_RTD, N_("Alternative calling convention")},		\
-    { "nortd", -MASK_RTD, N_("Use normal calling convention")},		\
-    { "regparm", MASK_REGPARM, N_("Pass some arguments in registers")},	\
-    { "noregparm", -MASK_REGPARM, N_("Pass all arguments on stack")},	\
-    { "32532", MASK_32532|MASK_32332, N_("Optimize for 32532 cpu")},	\
-    { "32332", MASK_32332, N_("Optimize for 32332 cpu")},		\
-    { "32332", -MASK_32532, 0},						\
-    { "32032", -(MASK_32532|MASK_32332), N_("Optimize for 32032")},	\
-    { "sb", -MASK_NO_SB,						\
-      N_("Register sb is zero. Use for absolute addressing")},		\
-    { "nosb", MASK_NO_SB, N_("Do not use register sb")},		\
-    { "bitfield", -MASK_NO_BITFIELD,					\
-      N_("Use bit-field instructions")},				\
-    { "nobitfield", MASK_NO_BITFIELD,					\
-      N_("Do not use bit-field instructions")},				\
-    { "himem", MASK_HIMEM, N_("Generate code for high memory")},	\
-    { "nohimem", -MASK_HIMEM, N_("Generate code for low memory")},	\
-    { "32381", MASK_32381, N_("32381 fpu")},				\
-    { "mult-add", MASK_MULT_ADD,					\
-      N_("Use multiply-accumulate fp instructions")},			\
-    { "nomult-add", -MASK_MULT_ADD,					\
-      N_("Do not use multiply-accumulate fp instructions") },		\
-    { "src", MASK_SRC, N_("\"Small register classes\" kludge")},	\
-    { "nosrc", -MASK_SRC, N_("No \"Small register classes\" kludge")},	\
-    { "ieee-compare", MASK_IEEE_COMPARE, N_("Use IEEE math for fp comparisons")},	\
-    { "noieee-compare", -MASK_IEEE_COMPARE,					\
-      N_("Do not use IEEE math for fp comparisons")},			\
-    { "", TARGET_DEFAULT, 0}}
-
-/* TARGET_DEFAULT is defined in encore.h, pc532.h, etc.  */
-
 /* When we are generating PIC, the sb is used as a pointer
    to the GOT. 32381 is a superset of 32081  */
 
@@ -179,7 +86,7 @@ extern int target_flags;
   if (target_flags & MASK_32532)		\
     target_flags |= MASK_32332; 		\
   if (flag_pic || TARGET_HIMEM)			\
-    target_flags |= MASK_NO_SB;			\
+    target_flags &= ~MASK_SB;			\
   if (TARGET_32381)				\
     target_flags |= MASK_32081;			\
   else						\
diff --git a/gcc/config/ns32k/ns32k.opt b/gcc/config/ns32k/ns32k.opt
new file mode 100644
index 00000000000..d31bdafea9d
--- /dev/null
+++ b/gcc/config/ns32k/ns32k.opt
@@ -0,0 +1,108 @@
+; Options for the NS32000 port of the compiler.
+
+; Copyright (C) 2005 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING.  If not, write to the Free
+; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+; 02111-1307, USA.
+
+m32032
+Target RejectNegative
+Optimize for 32032
+
+m32081
+Target RejectNegative Report Mask(32081)
+Use hardware fp
+
+m32332
+Target RejectNegative Report Mask(32332)
+Optimize for 32332
+
+m32381
+Target RejectNegative Report Mask(32381)
+Use the 32381 fpu
+
+m32532
+Target RejectNegative Report Mask(32532)
+Optimize for 32532
+
+mbitfield
+Target RejectNegative Report Mask(BITFIELD)
+Use bit-field instructions
+
+mhimem
+Target RejectNegative Report Mask(HIMEM)
+Generate code for high memory
+
+mieee-compare
+Target RejectNegative Report Mask(IEEE_COMPARE)
+Use IEEE math for fp comparisons
+
+mmult-add
+Target RejectNegative Report Mask(MULT_ADD)
+Use multiply-accumulate fp instructions
+
+mnobitfield
+Target RejectNegative Report InverseMask(BITFIELD)
+Do not use bit-field instructions
+
+mnohimem
+Target RejectNegative Report InverseMask(HIMEM)
+Generate code for low memory
+
+mnoieee-compare
+Target RejectNegative Report InverseMask(IEEE_COMPARE)
+Do not use IEEE math for fp comparisons
+
+mnomult-add
+Target RejectNegative Report InverseMask(MULT_ADD)
+Do not use multiply-accumulate fp instructions
+
+mnoregparm
+Target RejectNegative Report InverseMask(REGPARM)
+Pass all arguments on the stack
+
+mnortd
+Target RejectNegative Report InverseMask(RTD)
+Use the normal calling convention
+
+mnosb
+Target RejectNegative Report InverseMask(SB)
+Do not use register sb
+
+mnosrc
+Target RejectNegative Report InverseMask(SRC)
+Do not use the 'small register classes' kludge
+
+mregparm
+Target RejectNegative Report Mask(REGPARM)
+Pass some arguments in registers
+
+mrtd
+Target RejectNegative Report Mask(RTD)
+Use an alternative calling convention
+
+msb
+Target RejectNegative Report Mask(SB)
+Register sb is zero, use it for absolute addressing
+
+msoft-float
+Target RejectNegative
+Do not use hardware fp
+
+msrc
+Target RejectNegative Report Mask(SRC)
+Use the 'small register classes' kludge