diff options
| author | uweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-05-09 17:07:57 +0000 |
|---|---|---|
| committer | uweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-05-09 17:07:57 +0000 |
| commit | 61da801cdd977315e5589e35cbc6adf1a7097af1 (patch) | |
| tree | 7f6ab3c34953f7887d9f1d1d385d2d3507a7d854 | |
| parent | 2061f1ac1a02e62a9f7e917791a353e56da72c98 (diff) | |
| download | gcc-61da801cdd977315e5589e35cbc6adf1a7097af1.tar.gz | |
2005-05-09 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.md: ("INT"): New mode macro.
("one_cmpldi2", "one_cmplsi2", "one_cmplhi2", "one_cmplqi2"):
Merge.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@99451 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/s390/s390.md | 53 |
2 files changed, 14 insertions, 44 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b6ed448d538..abc2104ba28 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2005-05-09 Adrian Straetling <straetling@de.ibm.com> + + * config/s390/s390.md: ("INT"): New mode macro. + ("one_cmpldi2", "one_cmplsi2", "one_cmplhi2", "one_cmplqi2"): + Merge. 2005-05-09 Adrian Straetling <straetling@de.ibm.com> diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 60084682829..5a258e499ff 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -247,6 +247,10 @@ ;; the same template. (define_mode_macro HQI [HI QI]) +;; This mode macro allows the integer patterns to be defined from the +;; same template. +(define_mode_macro INT [(DI "TARGET_64BIT") SI HI QI]) + ;; ICM mask required to load MODE value into the highest subreg ;; of a SImode register. @@ -6582,53 +6586,14 @@ ;; ; -; one_cmpldi2 instruction pattern(s). -; - -(define_expand "one_cmpldi2" - [(parallel - [(set (match_operand:DI 0 "register_operand" "") - (xor:DI (match_operand:DI 1 "register_operand" "") - (const_int -1))) - (clobber (reg:CC 33))])] - "TARGET_64BIT" - "") - -; -; one_cmplsi2 instruction pattern(s). -; - -(define_expand "one_cmplsi2" - [(parallel - [(set (match_operand:SI 0 "register_operand" "") - (xor:SI (match_operand:SI 1 "register_operand" "") - (const_int -1))) - (clobber (reg:CC 33))])] - "" - "") - -; -; one_cmplhi2 instruction pattern(s). -; - -(define_expand "one_cmplhi2" - [(parallel - [(set (match_operand:HI 0 "register_operand" "") - (xor:HI (match_operand:HI 1 "register_operand" "") - (const_int -1))) - (clobber (reg:CC 33))])] - "" - "") - -; -; one_cmplqi2 instruction pattern(s). +; one_cmpl(di|si|hi|qi)2 instruction pattern(s). ; -(define_expand "one_cmplqi2" +(define_expand "one_cmpl<mode>2" [(parallel - [(set (match_operand:QI 0 "register_operand" "") - (xor:QI (match_operand:QI 1 "register_operand" "") - (const_int -1))) + [(set (match_operand:INT 0 "register_operand" "") + (xor:INT (match_operand:INT 1 "register_operand" "") + (const_int -1))) (clobber (reg:CC 33))])] "" "") |