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authoraesok <aesok@138bc75d-0d04-0410-961f-82ee72b054a4>2011-05-12 20:36:31 +0000
committeraesok <aesok@138bc75d-0d04-0410-961f-82ee72b054a4>2011-05-12 20:36:31 +0000
commit5d57e68b7178b1a2ab12bac209ac6f54574bfb6b (patch)
tree4d6123108261e16aefced35ddb0ebf30d0e0332d
parentf325319b5e9e2562640986532989320d5f394f02 (diff)
downloadgcc-5d57e68b7178b1a2ab12bac209ac6f54574bfb6b.tar.gz
* config/sparc/sparc.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P,
SYMBOLIC_CONST, RTX_OK_FOR_BASE_P, RTX_OK_FOR_INDEX_P): Remove. (RTX_OK_FOR_OFFSET_P, RTX_OK_FOR_OLO10_P): Move to... * config/sparc/sparc.c (RTX_OK_FOR_OFFSET_P, RTX_OK_FOR_OLO10_P): ...here. (sparc_mode_dependent_address_p): Use symbolic_operand instead of SYMBOLIC_CONST. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@173714 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog10
-rw-r--r--gcc/config/sparc/sparc.c14
-rw-r--r--gcc/config/sparc/sparc.h60
3 files changed, 21 insertions, 63 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4245ccc4263..58f25a7b686 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2011-05-12 Anatoly Sokolov <aesok@post.ru>
+
+ * config/sparc/sparc.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P,
+ SYMBOLIC_CONST, RTX_OK_FOR_BASE_P, RTX_OK_FOR_INDEX_P): Remove.
+ (RTX_OK_FOR_OFFSET_P, RTX_OK_FOR_OLO10_P): Move to...
+ * config/sparc/sparc.c (RTX_OK_FOR_OFFSET_P,
+ RTX_OK_FOR_OLO10_P): ...here.
+ (sparc_mode_dependent_address_p): Use symbolic_operand instead of
+ SYMBOLIC_CONST.
+
2011-05-12 Kai Tietz <ktietz@redhat.com>
* gimplify.c (gimple_boolify): Re-boolify expression
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index a3bab331910..e2443d7c4ed 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -3110,8 +3110,16 @@ legitimate_pic_operand_p (rtx x)
return true;
}
-/* Return nonzero if ADDR is a valid memory address.
- STRICT specifies whether strict register checking applies. */
+#define RTX_OK_FOR_OFFSET_P(X) \
+ (CONST_INT_P (X) && INTVAL (X) >= -0x1000 && INTVAL (X) < 0x1000 - 8)
+
+#define RTX_OK_FOR_OLO10_P(X) \
+ (CONST_INT_P (X) && INTVAL (X) >= -0x1000 && INTVAL (X) < 0xc00 - 8)
+
+/* Handle the TARGET_LEGITIMATE_ADDRESS_P target hook.
+
+ On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT
+ ordinarily. This changes a bit when generating PIC. */
static bool
sparc_legitimate_address_p (enum machine_mode mode, rtx addr, bool strict)
@@ -3706,7 +3714,7 @@ sparc_mode_dependent_address_p (const_rtx addr)
rtx op0 = XEXP (addr, 0);
rtx op1 = XEXP (addr, 1);
if (op0 == pic_offset_table_rtx
- && SYMBOLIC_CONST (op1))
+ && symbolic_operand (op1, VOIDmode))
return true;
}
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 7039fb048b0..ad354e89eca 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1538,41 +1538,6 @@ do { \
addresses which require two reload registers. */
#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
-
-/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
- and check its validity for a certain class.
- We have two alternate definitions for each of them.
- The usual definition accepts all pseudo regs; the other rejects
- them unless they have been allocated suitable hard regs.
- The symbol REG_OK_STRICT causes the latter definition to be used.
-
- Most source files want to accept pseudo regs in the hope that
- they will get allocated to the class that the insn wants them to be in.
- Source files for reload pass need to be strict.
- After reload, it makes no difference, since pseudo regs have
- been eliminated by then. */
-
-#ifndef REG_OK_STRICT
-
-/* Nonzero if X is a hard reg that can be used as an index
- or if it is a pseudo reg. */
-#define REG_OK_FOR_INDEX_P(X) \
- (REGNO (X) < 32 \
- || REGNO (X) == FRAME_POINTER_REGNUM \
- || REGNO (X) >= FIRST_PSEUDO_REGISTER)
-
-/* Nonzero if X is a hard reg that can be used as a base reg
- or if it is a pseudo reg. */
-#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X)
-
-#else
-
-/* Nonzero if X is a hard reg that can be used as an index. */
-#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
-/* Nonzero if X is a hard reg that can be used as a base reg. */
-#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
-
-#endif
/* Should gcc use [%reg+%lo(xx)+offset] addresses? */
@@ -1582,31 +1547,6 @@ do { \
#define USE_AS_OFFSETABLE_LO10 0
#endif
-/* On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT
- ordinarily. This changes a bit when generating PIC. The details are
- in sparc.c's implementation of TARGET_LEGITIMATE_ADDRESS_P. */
-
-#define SYMBOLIC_CONST(X) symbolic_operand (X, VOIDmode)
-
-#define RTX_OK_FOR_BASE_P(X) \
- ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
- || (GET_CODE (X) == SUBREG \
- && GET_CODE (SUBREG_REG (X)) == REG \
- && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
-
-#define RTX_OK_FOR_INDEX_P(X) \
- ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
- || (GET_CODE (X) == SUBREG \
- && GET_CODE (SUBREG_REG (X)) == REG \
- && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
-
-#define RTX_OK_FOR_OFFSET_P(X) \
- (GET_CODE (X) == CONST_INT && INTVAL (X) >= -0x1000 && INTVAL (X) < 0x1000 - 8)
-
-#define RTX_OK_FOR_OLO10_P(X) \
- (GET_CODE (X) == CONST_INT && INTVAL (X) >= -0x1000 && INTVAL (X) < 0xc00 - 8)
-
-
/* Try a machine-dependent way of reloading an illegitimate address
operand. If we find one, push the reload and jump to WIN. This
macro is used in only one place: `find_reloads_address' in reload.c. */