diff options
| author | prachigodbole <prachigodbole@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-03-06 10:08:51 +0000 |
|---|---|---|
| committer | prachigodbole <prachigodbole@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-03-06 10:08:51 +0000 |
| commit | 58fb6709272c3c9c3477a8ce6b00a93154dd21f1 (patch) | |
| tree | 89e941de2c6a3d72cbf8ffb75cb701208bba852e | |
| parent | c92412d2ebaef492905dcf5a854e2ceba198324f (diff) | |
| download | gcc-58fb6709272c3c9c3477a8ce6b00a93154dd21f1.tar.gz | |
gcc/
* config/mips/mips.c (mips_gen_const_int_vector): Change type of last
argument.
* config/mips/mips-protos.h (mips_gen_const_int_vector): Likewise.
gcc/testsuite/
* gcc.target/mips/msa-bclri.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@245910 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips-protos.h | 2 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msa-bclri.c | 15 |
5 files changed, 27 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8c9396795c4..5157670b995 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-03-06 Prachi Godbole <prachi.godbole@imgtec.com> + + * config/mips/mips.c (mips_gen_const_int_vector): Change type of last + argument. + * config/mips/mips-protos.h (mips_gen_const_int_vector): Likewise. + 2017-03-06 Richard Biener <rguenther@suse.de> * lto-streamer.c (lto_check_version): Use %qs in diagnostics. diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index b1bb22d7b95..95819ae8532 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -294,7 +294,7 @@ extern bool mips_const_vector_shuffle_set_p (rtx, machine_mode); extern bool mips_const_vector_bitimm_set_p (rtx, machine_mode); extern bool mips_const_vector_bitimm_clr_p (rtx, machine_mode); extern rtx mips_msa_vec_parallel_const_half (machine_mode, bool); -extern rtx mips_gen_const_int_vector (machine_mode, int); +extern rtx mips_gen_const_int_vector (machine_mode, HOST_WIDE_INT); extern bool mips_secondary_memory_needed (enum reg_class, enum reg_class, machine_mode); extern bool mips_cannot_change_mode_class (machine_mode, diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 4e13fbe1ec3..7778207dfc4 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -21630,7 +21630,7 @@ mips_expand_vi_broadcast (machine_mode vmode, rtx target, rtx elt) /* Return a const_int vector of VAL with mode MODE. */ rtx -mips_gen_const_int_vector (machine_mode mode, int val) +mips_gen_const_int_vector (machine_mode mode, HOST_WIDE_INT val) { int nunits = GET_MODE_NUNITS (mode); rtvec v = rtvec_alloc (nunits); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 26bfb0ac170..ed9bcb16466 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-03-06 Prachi Godbole <prachi.godbole@imgtec.com> + + * gcc.target/mips/msa-bclri.c: New test. + 2017-03-05 Paolo Carlini <paolo.carlini@oracle.com> PR c++/70266 diff --git a/gcc/testsuite/gcc.target/mips/msa-bclri.c b/gcc/testsuite/gcc.target/mips/msa-bclri.c new file mode 100644 index 00000000000..23c0442173e --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msa-bclri.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-mips16 -mfp64 -mhard-float -mmsa" } */ + +typedef long long v2i64 __attribute__ ((vector_size(16))); + +/* Test MSA AND.d optimization: generate BCLRI.d instead, for immediate const + vector operand with only one bit clear. */ + +void +and_d_msa (v2i64 *vx, v2i64 *vy) +{ + v2i64 and_vec = {0x7FFFFFFFFFFFFFFF, 0x7FFFFFFFFFFFFFFF}; + *vy = (*vx) & and_vec; +} +/* { dg-final { scan-assembler "bclri.d" } } */ |