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authorgganesh <gganesh@138bc75d-0d04-0410-961f-82ee72b054a4>2013-05-29 11:09:55 +0000
committergganesh <gganesh@138bc75d-0d04-0410-961f-82ee72b054a4>2013-05-29 11:09:55 +0000
commit46f4ca2eb9072533aac41117540f11322e57c1e2 (patch)
treec84838bf7b6e00d934b8f388e45352d7826f50f2
parent9b3c8ca40c052b60d68fe306b336801a5ae3c6b8 (diff)
downloadgcc-46f4ca2eb9072533aac41117540f11322e57c1e2.tar.gz
Enable FP Reassociation for AMD bdver1 and bdver2 architecture
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199406 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/i386/i386.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0e41fc2c15c..4b9e8460581 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-05-29 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
+
+ * config/i386/i386.c (initial_ix86_tune_features): Enable
+ FP Reassociation for AMD bdver1 and bdver2.
+
2013-05-29 Martin Jambor <mjambor@suse.cz>
* tree-cfg.c (verify_expr): Verify that BIT_FIELD_REF, REALPART_EXPR
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 20163b1a8a1..a025909cced 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2026,7 +2026,7 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = {
/* X86_TUNE_REASSOC_FP_TO_PARALLEL: Try to produce parallel computations
during reassociation of fp computation. */
- m_ATOM | m_HASWELL,
+ m_ATOM | m_HASWELL | m_BDVER1 | m_BDVER2,
/* X86_TUNE_GENERAL_REGS_SSE_SPILL: Try to spill general regs to SSE
regs instead of memory. */