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authorH.J. Lu <hjl.tools@gmail.com>2012-02-23 20:36:01 -0800
committerH.J. Lu <hjl.tools@gmail.com>2012-02-23 20:42:05 -0800
commit3c9f90331771c80657f97141831838b2a4315f49 (patch)
tree5b592c2592f05a919c8fa6af9734de99d1e0f8a7
parentad875082e4c94b274e1a83eac2ca929070a14fcf (diff)
downloadgcc-3c9f90331771c80657f97141831838b2a4315f49.tar.gz
Remove the second form in *movabs<mode>_[12]
2012-02-23 H.J. Lu <hongjiu.lu@intel.com> PR target/52352 PR target/52364 * config/i386/i386.md (*movabs<mode>_1): Remove the second form. (*movabs<mode>_2): Likewise. Conflicts: gcc/ChangeLog.addr32
-rw-r--r--gcc/ChangeLog.x327
-rw-r--r--gcc/config/i386/i386.md28
2 files changed, 18 insertions, 17 deletions
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index 605d3a303f8..d7838678969 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,3 +1,10 @@
+2012-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/52352
+ PR target/52364
+ * config/i386/i386.md (*movabs<mode>_1): Remove the second form.
+ (*movabs<mode>_2): Likewise.
+
2012-02-10 H.J. Lu <hongjiu.lu@intel.com>
PR target/52146
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index ec3993af38e..9242926ccb2 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2335,32 +2335,26 @@
(const_string "QI")))])
;; Stores and loads of ax to arbitrary constant address.
-;; We fake an second form of instruction to force reload to load address
-;; into register when rax is not available
(define_insn "*movabs<mode>_1"
- [(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
- (match_operand:SWI1248x 1 "nonmemory_operand" "a,er"))]
+ [(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i"))
+ (match_operand:SWI1248x 1 "register_operand" "a"))]
"TARGET_64BIT && ix86_check_movabs (insn, 0)"
- "@
- movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}
- mov{<imodesuffix>}\t{%1, %a0|%a0, %1}"
+ "movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}"
[(set_attr "type" "imov")
- (set_attr "modrm" "0,*")
- (set_attr "length_address" "8,0")
- (set_attr "length_immediate" "0,*")
+ (set_attr "modrm" "0")
+ (set_attr "length_address" "8")
+ (set_attr "length_immediate" "0")
(set_attr "memory" "store")
(set_attr "mode" "<MODE>")])
(define_insn "*movabs<mode>_2"
- [(set (match_operand:SWI1248x 0 "register_operand" "=a,r")
- (mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
+ [(set (match_operand:SWI1248x 0 "register_operand" "=a")
+ (mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i")))]
"TARGET_64BIT && ix86_check_movabs (insn, 1)"
- "@
- movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}
- mov{<imodesuffix>}\t{%a1, %0|%0, %a1}"
+ "movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}"
[(set_attr "type" "imov")
- (set_attr "modrm" "0,*")
- (set_attr "length_address" "8,0")
+ (set_attr "modrm" "0")
+ (set_attr "length_address" "8")
(set_attr "length_immediate" "0")
(set_attr "memory" "load")
(set_attr "mode" "<MODE>")])