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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2015-07-05 07:50:31 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2015-07-05 07:50:31 +0000
commit1d375a798853792b1bf504f554c367ec0fbfc047 (patch)
tree2ead129b539b876961452bf5f3dd621395a14b87
parent1d99ab0ae54d0adac2dcd1c1b2105dd09cac2d7e (diff)
downloadgcc-1d375a798853792b1bf504f554c367ec0fbfc047.tar.gz
gcc/
* target-insns.def (prefetch): New targetm instruction pattern. * tree-ssa-loop-prefetch.c: Include targeth. (tree_ssa_prefetch_arrays): Use prefetch targetm pattern instead of HAVE_*/gen_* interface. * builtins.c (expand_builtin_prefetch): Likewise. * toplev.c (process_options): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@225424 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/builtins.c6
-rw-r--r--gcc/target-insns.def1
-rw-r--r--gcc/toplev.c7
-rw-r--r--gcc/tree-ssa-loop-prefetch.c9
5 files changed, 17 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index da88d10d24a..2129526aece 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,14 @@
2015-07-05 Richard Sandiford <richard.sandiford@arm.com>
+ * target-insns.def (prefetch): New targetm instruction pattern.
+ * tree-ssa-loop-prefetch.c: Include targeth.
+ (tree_ssa_prefetch_arrays): Use prefetch targetm pattern instead
+ of HAVE_*/gen_* interface.
+ * builtins.c (expand_builtin_prefetch): Likewise.
+ * toplev.c (process_options): Likewise.
+
+2015-07-05 Richard Sandiford <richard.sandiford@arm.com>
+
* target-insns.def (untyped_call, untyped_return): New targetm
instruction patterns.
* builtins.c (expand_builtin_apply): Use them instead of
diff --git a/gcc/builtins.c b/gcc/builtins.c
index f35469493d6..b98bb066eb1 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -1282,18 +1282,16 @@ expand_builtin_prefetch (tree exp)
op2 = const0_rtx;
}
-#ifdef HAVE_prefetch
- if (HAVE_prefetch)
+ if (targetm.have_prefetch ())
{
struct expand_operand ops[3];
create_address_operand (&ops[0], op0);
create_integer_operand (&ops[1], INTVAL (op1));
create_integer_operand (&ops[2], INTVAL (op2));
- if (maybe_expand_insn (CODE_FOR_prefetch, 3, ops))
+ if (maybe_expand_insn (targetm.code_for_prefetch, 3, ops))
return;
}
-#endif
/* Don't do anything with direct references to volatile memory, but
generate code to handle other side effects. */
diff --git a/gcc/target-insns.def b/gcc/target-insns.def
index 61ec9a7de3b..45a700822f1 100644
--- a/gcc/target-insns.def
+++ b/gcc/target-insns.def
@@ -44,6 +44,7 @@ DEF_TARGET_INSN (mem_thread_fence, (rtx x0))
DEF_TARGET_INSN (memory_barrier, (void))
DEF_TARGET_INSN (nonlocal_goto, (rtx x0, rtx x1, rtx x2, rtx x3))
DEF_TARGET_INSN (nonlocal_goto_receiver, (void))
+DEF_TARGET_INSN (prefetch, (rtx x0, rtx x1, rtx x2))
DEF_TARGET_INSN (prologue, (void))
DEF_TARGET_INSN (return, (void))
DEF_TARGET_INSN (sibcall_epilogue, (void))
diff --git a/gcc/toplev.c b/gcc/toplev.c
index d0a8f0dc257..3d943a07816 100644
--- a/gcc/toplev.c
+++ b/gcc/toplev.c
@@ -1571,19 +1571,16 @@ process_options (void)
}
}
-#ifndef HAVE_prefetch
- if (flag_prefetch_loop_arrays > 0)
+ if (flag_prefetch_loop_arrays > 0 && !targetm.code_for_prefetch)
{
warning (0, "-fprefetch-loop-arrays not supported for this target");
flag_prefetch_loop_arrays = 0;
}
-#else
- if (flag_prefetch_loop_arrays > 0 && !HAVE_prefetch)
+ else if (flag_prefetch_loop_arrays > 0 && !targetm.have_prefetch ())
{
warning (0, "-fprefetch-loop-arrays not supported for this target (try -march switches)");
flag_prefetch_loop_arrays = 0;
}
-#endif
/* This combination of options isn't handled for i386 targets and doesn't
make much sense anyway, so don't allow it. */
diff --git a/gcc/tree-ssa-loop-prefetch.c b/gcc/tree-ssa-loop-prefetch.c
index 69968454c46..441e4a9d1f0 100644
--- a/gcc/tree-ssa-loop-prefetch.c
+++ b/gcc/tree-ssa-loop-prefetch.c
@@ -57,6 +57,7 @@ along with GCC; see the file COPYING3. If not see
#include "langhooks.h"
#include "tree-inline.h"
#include "tree-data-ref.h"
+#include "target.h"
/* FIXME: Needed for optabs, but this should all be moved to a TBD interface
@@ -216,10 +217,6 @@ along with GCC; see the file COPYING3. If not see
#define ACCEPTABLE_MISS_RATE 50
#endif
-#ifndef HAVE_prefetch
-#define HAVE_prefetch 0
-#endif
-
#define L1_CACHE_SIZE_BYTES ((unsigned) (L1_CACHE_SIZE * 1024))
#define L2_CACHE_SIZE_BYTES ((unsigned) (L2_CACHE_SIZE * 1024))
@@ -1954,11 +1951,11 @@ tree_ssa_prefetch_arrays (void)
bool unrolled = false;
int todo_flags = 0;
- if (!HAVE_prefetch
+ if (!targetm.have_prefetch ()
/* It is possible to ask compiler for say -mtune=i486 -march=pentium4.
-mtune=i486 causes us having PREFETCH_BLOCK 0, since this is part
of processor costs and i486 does not have prefetch, but
- -march=pentium4 causes HAVE_prefetch to be true. Ugh. */
+ -march=pentium4 causes targetm.have_prefetch to be true. Ugh. */
|| PREFETCH_BLOCK == 0)
return 0;