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authorRichard Sandiford <richard.sandiford@arm.com>2023-05-16 11:54:57 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2023-05-16 11:54:57 +0100
commit057e537e2a6f0fead3ebb503c8dcc08c9c6491ec (patch)
tree9f5891432207b92fb5b90cda4e45b7431eab35bc
parentac3a5bbc62949aeb061c01360632b3b8f5fafefa (diff)
downloadgcc-057e537e2a6f0fead3ebb503c8dcc08c9c6491ec.tar.gz
aarch64: Allow moves after tied-register intrinsics (2nd edition)
I missed these two in g:4ff89f10ca0d41f9cfa76 because I was testing on a system that didn't support big-endian compilation. Testing on aarch64_be-elf shows no other related failures (although the overall results are worse than for little-endian). gcc/testsuite/ * gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c: Allow mves to occur after the intrinsic instruction, rather than requiring them to happen before. * gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c: Likewise.
-rw-r--r--gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c10
2 files changed, 20 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c
index ae0a953f7b4..9975edb8fdb 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c
@@ -70,8 +70,13 @@ float32x4_t ufooq_lane(float32x4_t r, bfloat16x8_t x, bfloat16x4_t y)
/*
**ufoo_untied:
+** (
** mov v0.8b, v1.8b
** bfdot v0.2s, (v2.4h, v3.4h|v3.4h, v2.4h)
+** |
+** bfdot v1.2s, (v2.4h, v3.4h|v3.4h, v2.4h)
+** mov v0.8b, v1.8b
+** )
** ret
*/
float32x2_t ufoo_untied(float32x4_t unused, float32x2_t r, bfloat16x4_t x, bfloat16x4_t y)
@@ -81,8 +86,13 @@ float32x2_t ufoo_untied(float32x4_t unused, float32x2_t r, bfloat16x4_t x, bfloa
/*
**ufooq_lane_untied:
+** (
** mov v0.16b, v1.16b
** bfdot v0.4s, v2.8h, v3.2h\[1\]
+** |
+** bfdot v1.4s, v2.8h, v3.2h\[1\]
+** mov v0.16b, v1.16b
+** )
** ret
*/
float32x4_t ufooq_lane_untied(float32x4_t unused, float32x4_t r, bfloat16x8_t x, bfloat16x4_t y)
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c
index 61c7c51f5ec..76787f6bedd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c
@@ -115,8 +115,13 @@ int32x4_t sfooq_laneq (int32x4_t r, int8x16_t x, uint8x16_t y)
/*
**ufoo_untied:
+** (
** mov v0\.8b, v1\.8b
** usdot v0\.2s, v2\.8b, v3\.8b
+** |
+** usdot v1\.2s, v2\.8b, v3\.8b
+** mov v0\.8b, v1\.8b
+** )
** ret
*/
int32x2_t ufoo_untied (int32x2_t unused, int32x2_t r, uint8x8_t x, int8x8_t y)
@@ -126,8 +131,13 @@ int32x2_t ufoo_untied (int32x2_t unused, int32x2_t r, uint8x8_t x, int8x8_t y)
/*
**ufooq_laneq_untied:
+** (
** mov v0\.16b, v1\.16b
** usdot v0\.4s, v2\.16b, v3\.4b\[3\]
+** |
+** usdot v1\.4s, v2\.16b, v3\.4b\[3\]
+** mov v0\.16b, v1\.16b
+** )
** ret
*/
int32x4_t ufooq_laneq_untied (int32x2_t unused, int32x4_t r, uint8x16_t x, int8x16_t y)