Add round_nimm_scalar_predicate and use xBmhjl/pr69171/master

Add round_nimm_scalar_predicate for scalar SSE integer to floating point
conversions since round_nimm_predicate is for vector operand.

round_constraint can't be used on vector SSE patterns since it is mapped
to "vm".  The "xBm" constraint must be used in this case.

gcc/

	PR target/69171
	* config/i386/sse.md (<sse>_sqrt<mode>2<mask_name><round_name>):
	Use the "xBm" constraint.
	(float<sseintvecmodelower><mode>2<mask_name><round_name):
	Likewise.
	(sse_cvtsi2ss<round_name>): Use round_nimm_scalar_predicate.
	(sse_cvtsi2ssq<round_name>): Likewise.
	(sse_cvtss2si<round_name>): Likewise.
	(sse_cvtss2siq<round_name>): Likewise.
	(sse2_cvtsi2sdq<round_name>): Likewise.
	(sse2_cvtsd2si<round_name>): Likewise.
	(sse2_cvtsd2siq<round_name>): Likewise.
	* config/i386/subst.md (round_nimm_scalar_predicate): New
	predicate.

gcc/testsuite/

	PR target/69171
	* gcc.target/i386/pr69171-1.c: New test.
	* gcc.target/i386/pr69171-2.c: Likewise.
	* gcc.target/i386/pr69171-3.c: Likewise.
	* gcc.target/i386/pr69171-4.c: Likewise.
	* gcc.target/i386/pr69171-5.c: Likewise.
	* gcc.target/i386/pr69171-6.c: Likewise.

8 files changed, 96 insertions, 15 deletions

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index c21cc0e7c67..278dd383295 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1862,11 +1862,14 @@
 })
 
 (define_insn "<sse>_sqrt<mode>2<mask_name><round_name>"
-  [(set (match_operand:VF 0 "register_operand" "=v")
-	(sqrt:VF (match_operand:VF 1 "<round_nimm_predicate>" "<round_constraint>")))]
+  [(set (match_operand:VF 0 "register_operand" "=x,v")
+	(sqrt:VF (match_operand:VF 1 "<round_nimm_predicate>" "xBm,<round_constraint>")))]
   "TARGET_SSE && <mask_mode512bit_condition> && <round_mode512bit_condition>"
-  "%vsqrt<ssemodesuffix>\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
-  [(set_attr "type" "sse")
+  "@
+   sqrt<ssemodesuffix>\t{%1, %0|%0, %1}
+   vsqrt<ssemodesuffix>\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
+  [(set_attr "isa" "noavx,avx")
+   (set_attr "type" "sse")
    (set_attr "atom_sse_attr" "sqrt")
    (set_attr "btver2_sse_attr" "sqrt")
    (set_attr "prefix" "maybe_vex")
@@ -4269,7 +4272,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x,x,v")
 	(vec_merge:V4SF
 	  (vec_duplicate:V4SF
-	    (float:SF (match_operand:SI 2 "<round_nimm_predicate>" "r,m,<round_constraint3>")))
+	    (float:SF (match_operand:SI 2 "<round_nimm_scalar_predicate>" "r,m,<round_constraint3>")))
 	  (match_operand:V4SF 1 "register_operand" "0,0,v")
 	  (const_int 1)))]
   "TARGET_SSE"
@@ -4291,7 +4294,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x,x,v")
 	(vec_merge:V4SF
 	  (vec_duplicate:V4SF
-	    (float:SF (match_operand:DI 2 "<round_nimm_predicate>" "r,m,<round_constraint3>")))
+	    (float:SF (match_operand:DI 2 "<round_nimm_scalar_predicate>" "r,m,<round_constraint3>")))
 	  (match_operand:V4SF 1 "register_operand" "0,0,v")
 	  (const_int 1)))]
   "TARGET_SSE && TARGET_64BIT"
@@ -4314,7 +4317,7 @@
   [(set (match_operand:SI 0 "register_operand" "=r,r")
 	(unspec:SI
 	  [(vec_select:SF
-	     (match_operand:V4SF 1 "<round_nimm_predicate>" "v,<round_constraint2>")
+	     (match_operand:V4SF 1 "<round_nimm_scalar_predicate>" "v,<round_constraint2>")
 	     (parallel [(const_int 0)]))]
 	  UNSPEC_FIX_NOTRUNC))]
   "TARGET_SSE"
@@ -4344,7 +4347,7 @@
   [(set (match_operand:DI 0 "register_operand" "=r,r")
 	(unspec:DI
 	  [(vec_select:SF
-	     (match_operand:V4SF 1 "<round_nimm_predicate>" "v,<round_constraint2>")
+	     (match_operand:V4SF 1 "<round_nimm_scalar_predicate>" "v,<round_constraint2>")
 	     (parallel [(const_int 0)]))]
 	  UNSPEC_FIX_NOTRUNC))]
   "TARGET_SSE && TARGET_64BIT"
@@ -4431,12 +4434,15 @@
    (set_attr "mode" "<ssescalarmode>")])
 
 (define_insn "float<sseintvecmodelower><mode>2<mask_name><round_name>"
-  [(set (match_operand:VF1 0 "register_operand" "=v")
+  [(set (match_operand:VF1 0 "register_operand" "=x,v")
 	(float:VF1
-	  (match_operand:<sseintvecmode> 1 "<round_nimm_predicate>" "<round_constraint>")))]
+	  (match_operand:<sseintvecmode> 1 "<round_nimm_predicate>" "xBm,<round_constraint>")))]
   "TARGET_SSE2 && <mask_mode512bit_condition> && <round_mode512bit_condition>"
-  "%vcvtdq2ps\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
-  [(set_attr "type" "ssecvt")
+  "@
+   cvtdq2ps\t{%1, %0|%0, %1}
+   vcvtdq2ps\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
+  [(set_attr "isa" "noavx,avx")
+   (set_attr "type" "ssecvt")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "<sseinsnmode>")])
 
@@ -4684,7 +4690,7 @@
   [(set (match_operand:V2DF 0 "register_operand" "=x,x,v")
 	(vec_merge:V2DF
 	  (vec_duplicate:V2DF
-	    (float:DF (match_operand:DI 2 "<round_nimm_predicate>" "r,m,<round_constraint3>")))
+	    (float:DF (match_operand:DI 2 "<round_nimm_scalar_predicate>" "r,m,<round_constraint3>")))
 	  (match_operand:V2DF 1 "register_operand" "0,0,v")
 	  (const_int 1)))]
   "TARGET_SSE2 && TARGET_64BIT"
@@ -4806,7 +4812,7 @@
   [(set (match_operand:SI 0 "register_operand" "=r,r")
 	(unspec:SI
 	  [(vec_select:DF
-	     (match_operand:V2DF 1 "<round_nimm_predicate>" "v,<round_constraint2>")
+	     (match_operand:V2DF 1 "<round_nimm_scalar_predicate>" "v,<round_constraint2>")
 	     (parallel [(const_int 0)]))]
 	  UNSPEC_FIX_NOTRUNC))]
   "TARGET_SSE2"
@@ -4837,7 +4843,7 @@
   [(set (match_operand:DI 0 "register_operand" "=r,r")
 	(unspec:DI
 	  [(vec_select:DF
-	     (match_operand:V2DF 1 "<round_nimm_predicate>" "v,<round_constraint2>")
+	     (match_operand:V2DF 1 "<round_nimm_scalar_predicate>" "v,<round_constraint2>")
 	     (parallel [(const_int 0)]))]
 	  UNSPEC_FIX_NOTRUNC))]
   "TARGET_SSE2 && TARGET_64BIT"
diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md
index d35f34ca57c..e2f67c4a00c 100644
--- a/gcc/config/i386/subst.md
+++ b/gcc/config/i386/subst.md
@@ -124,6 +124,7 @@
 (define_subst_attr "round_constraint2" "round" "m" "v")
 (define_subst_attr "round_constraint3" "round" "rm" "r")
 (define_subst_attr "round_nimm_predicate" "round" "vector_operand" "register_operand")
+(define_subst_attr "round_nimm_scalar_predicate" "round" "nonimmediate_operand" "register_operand")
 (define_subst_attr "round_prefix" "round" "vex" "evex")
 (define_subst_attr "round_mode512bit_condition" "round" "1" "(<MODE>mode == V16SFmode
 							      || <MODE>mode == V8DFmode
diff --git a/gcc/testsuite/gcc.target/i386/pr69171-1.c b/gcc/testsuite/gcc.target/i386/pr69171-1.c
new file mode 100644
index 00000000000..0b92c22b61f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr69171-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2 -mno-avx -mfpmath=sse" } */
+
+#pragma pack(2)
+struct {
+  int n;
+} a;
+extern void fn2 (float);
+void
+fn1 ()
+{
+  fn2 (a.n);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr69171-2.c b/gcc/testsuite/gcc.target/i386/pr69171-2.c
new file mode 100644
index 00000000000..80e1a097f20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr69171-2.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2 -mno-avx -mfpmath=sse" } */
+
+#pragma pack(2)
+struct {
+  long long int n;
+} a;
+extern void fn2 (float);
+void
+fn1 ()
+{
+  fn2 (a.n);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr69171-3.c b/gcc/testsuite/gcc.target/i386/pr69171-3.c
new file mode 100644
index 00000000000..73717bef6ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr69171-3.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target fpic } } */
+/* { dg-options "-fpic -O2 -msse2 -mno-avx -mfpmath=sse" } */
+
+__extension__ typedef __UINTPTR_TYPE__ uintptr_t;
+
+extern int glob1;
+
+double
+foo (void)
+{
+  return (double) (int) (uintptr_t) &glob1;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr69171-4.c b/gcc/testsuite/gcc.target/i386/pr69171-4.c
new file mode 100644
index 00000000000..e4acf3fd5f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr69171-4.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target fpic } } */
+/* { dg-options "-fpic -O2 -msse2 -mno-avx -mfpmath=sse" } */
+
+__extension__ typedef __UINTPTR_TYPE__ uintptr_t;
+
+extern int glob1;
+
+float
+foo (void)
+{
+  return (float) (int) (uintptr_t) &glob1;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr69171-5.c b/gcc/testsuite/gcc.target/i386/pr69171-5.c
new file mode 100644
index 00000000000..230af3ec3d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr69171-5.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target fpic } } */
+/* { dg-options "-fpic -O2 -msse2 -mno-avx -mfpmath=sse" } */
+
+__extension__ typedef __UINTPTR_TYPE__ uintptr_t;
+
+extern int glob1;
+
+float
+foo (void)
+{
+  return (float) (long long) (uintptr_t) &glob1;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr69171-6.c b/gcc/testsuite/gcc.target/i386/pr69171-6.c
new file mode 100644
index 00000000000..b82627a4419
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr69171-6.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target fpic } } */
+/* { dg-options "-fpic -O2 -msse2 -mno-avx -mfpmath=sse" } */
+
+__extension__ typedef __UINTPTR_TYPE__ uintptr_t;
+
+extern int glob1;
+
+double
+foo (void)
+{
+  return (double) (long long) (uintptr_t) &glob1;
+}